diff options
| author | Tom Warren <twarren@nvidia.com> | 2014-08-18 13:27:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:03:20 +0100 |
| commit | 842f76c90ca874e6497f6af49ee36ec758265171 (patch) | |
| tree | f404903eb8444b1303ab583ea90f856284276c1e /src/soc/nvidia/tegra132/pmc.h | |
| parent | c65d8c48df9954b7a298de72b08b71fef92472d5 (diff) | |
tegra132: Add special I2C6 init
I2C6 has a special mux in the SOR/DC domain, so there's a ton
of devices that need to be clocked, SOR unpowergated, and then
the I2C6 muxing done in the DPAUX_HYBRID_PADCTL register.
BUG=none
BRANCH=none
TEST=none, built rush/ryu AOK
Change-Id: Ibeeda763b7fb30fabaee85d03fbf7d5efb42a30a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0b4da98e20a89b045f2d5b5033a27cd7ab855f35
Original-Change-Id: I4aaa74ef1b3009da621d1a2ef6f79de8ebf545e2
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/212887
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8992
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/pmc.h')
| -rw-r--r-- | src/soc/nvidia/tegra132/pmc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/pmc.h b/src/soc/nvidia/tegra132/pmc.h index e9fbcd602e..60d97c3cbe 100644 --- a/src/soc/nvidia/tegra132/pmc.h +++ b/src/soc/nvidia/tegra132/pmc.h @@ -34,6 +34,7 @@ enum { POWER_PARTID_CE0 = 14, POWER_PARTID_C0NC = 15, POWER_PARTID_C1NC = 16, + POWER_PARTID_SOR = 17, POWER_PARTID_DIS = 18, POWER_PARTID_DISB = 19, POWER_PARTID_XUSBA = 20, |