t132: handle carve-outs for addressable memory

The carve-out regions need to be taken into account when
calculating addressable memory because those regions aren't
accessible from the main cpu. The additional exposed functions
are to accommodate adding resources during ramstage resource
reading. The TZ (trust zone) region is empty for now until
more documentation is provided on determining its location.

BUG=None
TEST=Built and booted through attempting payload loading.
     MTS carve-out is taken into account programmatically.

Original-Change-Id: I3301b2a12680ad79047198ada41f32eb1b7fa68b
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207585
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 15b9c74dd1ef5bfb1fd7c6dab50624f815658e14)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I46d54dbbb8e102fc70ab34bc4bbd2361ef1ea504
Reviewed-on: http://review.coreboot.org/8591
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

1 files changed, 26 insertions, 1 deletions

diff --git a/src/soc/nvidia/tegra132/include/soc/addressmap.h b/src/soc/nvidia/tegra132/include/soc/addressmap.h
index 021a523f0d..2c6dc5efc4 100644
--- a/src/soc/nvidia/tegra132/include/soc/addressmap.h
+++ b/src/soc/nvidia/tegra132/include/soc/addressmap.h
@@ -81,7 +81,32 @@ enum {
 	TEGRA_I2C_BASE_COUNT = 6,
 };
 
+/* Return total size of DRAM memory configured on the platform. */
 int sdram_size_mb(void);
-uintptr_t sdram_max_addressable_mb(void);
+
+enum {
+	ADDRESS_SPACE_32_BIT = 32,
+	ADDRESS_SPACE_64_BIT = 64,
+};
+
+/*
+ * Return the address range of memory for provided address width. The base
+ * and end parameters in 1MiB units with end being exclusive to the range.
+ */
+void memory_range_by_bits(int bits, uintptr_t *base_mib, uintptr_t *end_mib);
+
+enum {
+	CARVEOUT_TZ,
+	CARVEOUT_SEC,
+	CARVEOUT_MTS,
+	CARVEOUT_VPR,
+	CARVEOUT_NUM,
+};
+
+/* Provided the careout id, obtain the base and size in 1MiB units. */
+void carveout_range(int id, uintptr_t *base_mib, size_t *size_mib);
+
+/* Return pointer and size in 1MiB units. */
+uintptr_t framebuffer_attributes(size_t *size_mib);
 
 #endif /* __SOC_NVIDIA_TEGRA132_INCLUDE_SOC_ADDRESS_MAP_H__ */