diff options
| author | Tom Warren <twarren@nvidia.com> | 2014-08-18 13:27:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:03:20 +0100 |
| commit | 842f76c90ca874e6497f6af49ee36ec758265171 (patch) | |
| tree | f404903eb8444b1303ab583ea90f856284276c1e /src/soc/nvidia/tegra132/include | |
| parent | c65d8c48df9954b7a298de72b08b71fef92472d5 (diff) | |
tegra132: Add special I2C6 init
I2C6 has a special mux in the SOR/DC domain, so there's a ton
of devices that need to be clocked, SOR unpowergated, and then
the I2C6 muxing done in the DPAUX_HYBRID_PADCTL register.
BUG=none
BRANCH=none
TEST=none, built rush/ryu AOK
Change-Id: Ibeeda763b7fb30fabaee85d03fbf7d5efb42a30a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0b4da98e20a89b045f2d5b5033a27cd7ab855f35
Original-Change-Id: I4aaa74ef1b3009da621d1a2ef6f79de8ebf545e2
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/212887
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8992
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/include')
| -rw-r--r-- | src/soc/nvidia/tegra132/include/soc/clock.h | 1 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/include/soc/padconfig.h | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h index 494f28d4db..eecb735672 100644 --- a/src/soc/nvidia/tegra132/include/soc/clock.h +++ b/src/soc/nvidia/tegra132/include/soc/clock.h @@ -146,6 +146,7 @@ enum { CLK_W_CEC = 0x1 << 8, CLK_W_XUSB_PADCTL = 0x1 << 14, CLK_W_ENTROPY = 0x1 << 21, + CLK_W_DP2 = 0x1 << 24, CLK_W_AMX0 = 0x1 << 25, CLK_W_ADX0 = 0x1 << 26, CLK_W_DVFS = 0x1 << 27, diff --git a/src/soc/nvidia/tegra132/include/soc/padconfig.h b/src/soc/nvidia/tegra132/include/soc/padconfig.h index addec8b041..a4339891f2 100644 --- a/src/soc/nvidia/tegra132/include/soc/padconfig.h +++ b/src/soc/nvidia/tegra132/include/soc/padconfig.h @@ -85,5 +85,7 @@ struct pad_config { * Configure the pads associated with entry according to the configuration. */ void soc_configure_pads(const struct pad_config * const entries, size_t num); +/* I2C6 requires special init as its pad lives int the SOR/DPAUX block */ +void soc_configure_i2c6pad(void); #endif /* __SOC_NVIDIA_TEGRA132_PAD_CFG_H */ |