diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-11-25 16:47:56 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 20:46:16 +0200 |
commit | d8060904eea998136f39866d0eaba233882a5f3f (patch) | |
tree | 1d4abd1328ae75dd8cb32e6f194e35cce53e5d8e /src/soc/nvidia/tegra132/cpu.c | |
parent | e37c18f891920be529b90eda856cf7389f2c8bc3 (diff) |
tegra132: prepare cpu startup in psci
In order to start CPUs while in secmon/psci one needs to
set up the proper SoC state. Therefore, refactor the current
CPU startup API to allow for this by adding cpu_prepare_startup()
and start_cpu_silent().
BUG=chrome-os-partner:32136
BRANCH=None
TEST=Built and booted kernel.
Change-Id: I1424500f6c9398f7d44350949c25bb3d4832cec7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 70f9cf67085b345b529b41dd6554e37d38a5b350
Original-Change-Id: I842a391d3e27ddbfcdef1a2d60e3c66e60f99c77
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/231936
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9531
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/cpu.c')
-rw-r--r-- | src/soc/nvidia/tegra132/cpu.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra132/cpu.c b/src/soc/nvidia/tegra132/cpu.c index 5dd4c53493..c79bc9cf4e 100644 --- a/src/soc/nvidia/tegra132/cpu.c +++ b/src/soc/nvidia/tegra132/cpu.c @@ -60,12 +60,8 @@ static void set_armv8_64bit_reset_vector(uintptr_t entry) write32(0, &pmc->secure_scratch35); } - -void start_cpu(int cpu, void *entry_64) +void cpu_prepare_startup(void *entry_64) { - printk(BIOS_DEBUG, "Starting CPU%d @ %p trampolining to %p.\n", - cpu, reset_entry_32bit, entry_64); - /* Warm reset vector is pulled from the PMC scratch registers. */ set_armv8_64bit_reset_vector((uintptr_t)entry_64); @@ -75,6 +71,18 @@ void start_cpu(int cpu, void *entry_64) * to the traompoline location. */ set_armv8_32bit_reset_vector((uintptr_t)reset_entry_32bit); +} +void start_cpu_silent(int cpu, void *entry_64) +{ + cpu_prepare_startup(entry_64); enable_core_clocks(cpu); } + +void start_cpu(int cpu, void *entry_64) +{ + printk(BIOS_DEBUG, "Starting CPU%d @ %p trampolining to %p.\n", + cpu, reset_entry_32bit, entry_64); + + start_cpu_silent(cpu, entry_64); +} |