tegra132: remove framebuffer reservation

There's no need to reserve the framebuffer within coreboot. If the
payloads need a framebuffer they can allocate one themselves.

BUG=chrome-os-partner:31355
BRANCH=None
TEST=Built and booted on ryu.

Original-Change-Id: I8d8b159e7fdd877e392193c5474a7518e9b3ad21
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/221726
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>

(cherry picked from commit 1ff8da9fed414fceeda3f94b296312f4531b320f)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I4e7c0417824f2be9836b1bc2bb99322c78490ca2
Reviewed-on: http://review.coreboot.org/9256
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 11 insertions, 11 deletions

diff --git a/src/soc/nvidia/tegra132/cbmem.c b/src/soc/nvidia/tegra132/cbmem.c
index da08520931..e371298241 100644
--- a/src/soc/nvidia/tegra132/cbmem.c
+++ b/src/soc/nvidia/tegra132/cbmem.c
@@ -23,18 +23,18 @@
 void *cbmem_top(void)
 {
 	static uintptr_t addr;
-	size_t fb_size;
 
-	/*
-	 * FIXME(adurbin): The TZ registers are not accessible to the AVP.
-	 * Therefore, if there is a TZ carveout then it needs to be handled
-	 * here while executing on the AVP in order to properly place the
-	 * CBMEM region.
-	 */
+	if (addr == 0) {
+		uintptr_t begin_mib;
+		uintptr_t end_mib;
 
-	/* CBMEM starts downwards from the framebuffer. */
-	if (addr == 0)
-		addr = framebuffer_attributes(&fb_size);
+		memory_in_range_below_4gb(&begin_mib, &end_mib);
+		/* Make sure we consume everything up to 4GiB. */
+		if (end_mib == 4096)
+			addr = ~(uint32_t)0;
+		else
+			addr = end_mib << 20;
+	}
 
-	return (void *)(addr << 20UL);
+	return (void *)addr;
 }