coreboot t132: Enable loading of romstage from CBFS media

Add proper Kconfig options and initialize cbfs media to enable loading of
romstage

BUG=None
BRANCH=None
TEST=Compiles successfully for rush and cbfs_load_stage returns entry pointer
for romstage

Original-Change-Id: If62edcdc0496d89d30003ffd7b827b77835910fd
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205762
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit c89c05bc86fd6c1e49fbed5e0730659b64bffc6c)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I68c10171424c85605b5065a19634d3c5dd639b78
Reviewed-on: http://review.coreboot.org/8572
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

1 files changed, 13 insertions, 1 deletions

diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index 46b7b3ab56..62e5228829 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -24,12 +24,15 @@
 #include <console/console.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
+#include <arch/stages.h>
 
 #include "pinmux.h"
 #include "power.h"
 
 void main(void)
 {
+	void *entry;
+
 	// enable pinmux clamp inputs
 	clamp_tristate_inputs();
 
@@ -65,5 +68,14 @@ void main(void)
 
 	printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n");
 
-	while(1);
+	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage");
+
+	if (entry) {
+		printk(BIOS_INFO, "T132 bootblock: jumping to romstage\n");
+		stage_exit(entry);
+	} else {
+		printk(BIOS_INFO, "T132 bootblock: fallback/romstage not found\n");
+	}
+
+	hlt();
 }