diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-07-10 12:50:27 -0500 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-05 17:31:04 +0100 |
| commit | 5626d8f59a4a70da4724e778a38e0fe6847fa5d8 (patch) | |
| tree | 4df6904e61edce7d7216970cff7ff1371012b11c /src/soc/nvidia/tegra132/Makefile.inc | |
| parent | 1b770fb4b5a83042a6007cd9d263bfdf078822ad (diff) | |
t132: bring up 64-bit denver core
The startup sequence for cpu0 is implemented while also
providing a trampoline for transitioning to 64-bit mode because
the denver cores on t132 come out of cold reset in 32-bit mode.
Mainboard callbacks are provided for providing the board-specific
bits of the bringup sequence.
BUG=chrome-os-partner:29923
BRANCH=None
TEST=Built and booted through ramstage.
Original-Change-Id: I50755fb6b06db994af8667969d8493f214a70aae
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207263
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
(cherry picked from commit 17f09bf4bdb43986c19067ca8fd65d4c5365a7c6)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I14d99c24dd6e29a4584c8c548c4b26c92b6ade97
Reviewed-on: http://review.coreboot.org/8586
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/Makefile.inc')
| -rw-r--r-- | src/soc/nvidia/tegra132/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc index 8c085a945a..252f1a22dd 100644 --- a/src/soc/nvidia/tegra132/Makefile.inc +++ b/src/soc/nvidia/tegra132/Makefile.inc @@ -27,6 +27,7 @@ romstage-y += i2c.c romstage-y += dma.c romstage-y += monotonic_timer.c romstage-y += romstage.c +romstage-y += power.c romstage-y += sdram.c romstage-y += sdram_lp0.c romstage-y += ../tegra/gpio.c |