diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-08-06 13:42:37 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-09 01:32:21 +0200 |
| commit | 9ba069957b1591628ea4d5e2a9ff8553efa52c71 (patch) | |
| tree | 0f370b43773242ce704158c676f964432230cb3b /src/soc/nvidia/tegra132/Kconfig | |
| parent | 0c634159a35ff567fc4897df25dddddd181a1a8c (diff) | |
soc/nvidia/tegra132: remove tegra132 support
As no more mainboards are utilizing this SoC support code remove
it. It can be resurrected if ever needed.
BUG=chrome-os-partner:55932
Change-Id: Ic3caf6e6c9b62d012679b996abaa525c8bf679a9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16108
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/nvidia/tegra132/Kconfig')
| -rw-r--r-- | src/soc/nvidia/tegra132/Kconfig | 59 |
1 files changed, 0 insertions, 59 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig deleted file mode 100644 index b47089268a..0000000000 --- a/src/soc/nvidia/tegra132/Kconfig +++ /dev/null @@ -1,59 +0,0 @@ -config SOC_NVIDIA_TEGRA132 - bool - default n - select ARCH_BOOTBLOCK_ARMV4 - select BOOTBLOCK_CUSTOM - select ARCH_VERSTAGE_ARMV4 - select ARCH_ROMSTAGE_ARMV4 - select ARCH_RAMSTAGE_ARMV8_64 - select BOOTBLOCK_CONSOLE - select GIC - select HAVE_MONOTONIC_TIMER - select GENERIC_UDELAY - select HAVE_HARD_RESET - select HAVE_UART_SPECIAL - select GENERIC_GPIO_LIB - select UART_OVERRIDE_REFCLK - -if SOC_NVIDIA_TEGRA132 - -config CHROMEOS - select VBOOT_OPROM_MATTERS - -config MAINBOARD_DO_DSI_INIT - bool "Use dsi graphics interface" - depends on MAINBOARD_DO_NATIVE_VGA_INIT - default n - help - Initialize dsi display - -config MAINBOARD_DO_SOR_INIT - bool "Use dp graphics interface" - depends on MAINBOARD_DO_NATIVE_VGA_INIT - default n - help - Initialize dp display - -config MTS_DIRECTORY - string "Directory where MTS microcode files are located" - default "3rdparty/blobs/cpu/nvidia/tegra132/current/prod" - help - Path to directory where MTS microcode files are located. - -config TRUSTZONE_CARVEOUT_SIZE_MB - hex "Size of Trust Zone region" - default 0x4 - help - Size of Trust Zone area in MiB to reserve in memory map. - -config BOOTROM_SDRAM_INIT - bool "SoC BootROM does SDRAM init with full BCT" - default n - help - Use during Ryu LPDDR3 bringup - -# Default to 700MHz. This value is based on nv bootloader setting. -config PLLX_KHZ - int - default 700000 -endif |