diff options
| author | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-11-10 00:35:02 +0100 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-03-07 12:47:01 +0000 |
| commit | c9b7d1fb57787d7037a5bce031a1300d13f5df40 (patch) | |
| tree | 57788b70b069229693dae5727cb8acc54eee3c14 /src/soc/nvidia/tegra124 | |
| parent | 7a732b4781e7b83abda3230055d7110e1db730f3 (diff) | |
security/tpm: Fix TCPA log feature
Until now the TCPA log wasn't working correctly.
* Refactor TCPA log code.
* Add TCPA log dump fucntion.
* Make TCPA log available in bootblock.
* Fix TCPA log formatting.
* Add x86 and Cavium memory for early log.
Change-Id: Ic93133531b84318f48940d34bded48cbae739c44
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/nvidia/tegra124')
| -rw-r--r-- | src/soc/nvidia/tegra124/include/soc/memlayout.ld | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/memlayout.ld b/src/soc/nvidia/tegra124/include/soc/memlayout.ld index 615f05636d..40af0d5218 100644 --- a/src/soc/nvidia/tegra124/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra124/include/soc/memlayout.ld @@ -27,9 +27,10 @@ SECTIONS { SRAM_START(0x40000000) TTB(0x40000000, 16K + 32) - PRERAM_CBMEM_CONSOLE(0x40004020, 8K - 32) - PRERAM_CBFS_CACHE(0x40006000, 16K) - VBOOT2_WORK(0x4000A000, 16K) + PRERAM_CBMEM_CONSOLE(0x40004020, 6K - 32) + PRERAM_CBFS_CACHE(0x40005800, 16K) + VBOOT2_WORK(0x40009800, 16K) + VBOOT2_TPM_LOG(0x4000D800, 2K) STACK(0x4000E000, 8K) BOOTBLOCK(0x40010000, 30K) VERSTAGE(0x40017800, 72K) |