arm(64): Globally replace writel(v, a) with write32(a, v)

This patch is a raw application of the following spatch to src/:

@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)

BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)

Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 12 insertions, 11 deletions

diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c
index 0584177d5e..e1d022a420 100644
--- a/src/soc/nvidia/tegra124/spi.c
+++ b/src/soc/nvidia/tegra124/spi.c
@@ -230,7 +230,7 @@ int spi_claim_bus(struct spi_slave *slave)
 	else
 		val |= SPI_CMD1_CS_SW_VAL;
 
-	writel(val, &regs->command1);
+	write32(&regs->command1, val);
 	return 0;
 }
 
@@ -246,7 +246,7 @@ void spi_release_bus(struct spi_slave *slave)
 	else
 		val &= ~SPI_CMD1_CS_SW_VAL;
 
-	writel(val, &regs->command1);
+	write32(&regs->command1, val);
 }
 
 static void dump_fifo_status(struct tegra_spi_channel *spi)
@@ -383,12 +383,12 @@ static int tegra_spi_pio_prepare(struct tegra_spi_channel *spi,
 
 	/* BLOCK_SIZE in SPI_DMA_BLK register applies to both DMA and
 	 * PIO transfers */
-	writel(todo - 1, &spi->regs->dma_blk);
+	write32(&spi->regs->dma_blk, todo - 1);
 
 	if (dir == SPI_SEND) {
 		unsigned int to_fifo = bytes;
 		while (to_fifo) {
-			writel(*p, &spi->regs->tx_fifo);
+			write32(&spi->regs->tx_fifo, *p);
 			p++;
 			to_fifo--;
 		}
@@ -493,11 +493,12 @@ static int tegra_spi_dma_prepare(struct tegra_spi_channel *spi,
 		/* ensure bytes to send will be visible to DMA controller */
 		dcache_clean_by_mva(spi->out_buf, bytes);
 
-		writel((u32)&spi->regs->tx_fifo, &spi->dma_out->regs->apb_ptr);
-		writel((u32)spi->out_buf, &spi->dma_out->regs->ahb_ptr);
+		write32(&spi->dma_out->regs->apb_ptr,
+			(u32)&spi->regs->tx_fifo);
+		write32(&spi->dma_out->regs->ahb_ptr, (u32)spi->out_buf);
 		setbits_le32(&spi->dma_out->regs->csr, APB_CSR_DIR);
 		setup_dma_params(spi, spi->dma_out);
-		writel(wcount, &spi->dma_out->regs->wcount);
+		write32(&spi->dma_out->regs->wcount, wcount);
 	} else {
 		spi->dma_in = dma_claim();
 		if (!spi->dma_in)
@@ -506,15 +507,15 @@ static int tegra_spi_dma_prepare(struct tegra_spi_channel *spi,
 		/* avoid data collisions */
 		dcache_clean_invalidate_by_mva(spi->in_buf, bytes);
 
-		writel((u32)&spi->regs->rx_fifo, &spi->dma_in->regs->apb_ptr);
-		writel((u32)spi->in_buf, &spi->dma_in->regs->ahb_ptr);
+		write32(&spi->dma_in->regs->apb_ptr, (u32)&spi->regs->rx_fifo);
+		write32(&spi->dma_in->regs->ahb_ptr, (u32)spi->in_buf);
 		clrbits_le32(&spi->dma_in->regs->csr, APB_CSR_DIR);
 		setup_dma_params(spi, spi->dma_in);
-		writel(wcount, &spi->dma_in->regs->wcount);
+		write32(&spi->dma_in->regs->wcount, wcount);
 	}
 
 	/* BLOCK_SIZE starts at n-1 */
-	writel(todo - 1, &spi->regs->dma_blk);
+	write32(&spi->regs->dma_blk, todo - 1);
 	return todo;
 }