summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra124/memlayout.ld
diff options
context:
space:
mode:
authorRonak Kanabar <ronak.kanabar@intel.com>2023-11-06 14:54:16 +0530
committerSubrata Banik <subratabanik@google.com>2024-05-23 13:52:47 +0000
commit3a5ed9b45a97025958ec0b5a859c6d4cd5b5a69c (patch)
treeda79b1002a35a4c0dc292c4a5c47e2cb4a34d997 /src/soc/nvidia/tegra124/memlayout.ld
parentc8b379bb7928a0e9c1e2dc42217e807c46a009e8 (diff)
mb/google/brya: Add romstage early graphics for nissa
1) Add all changes needed for early graphics 2) select MAINBOARD_USE_EARLY_LIBGFXINIT for nissa The InnoLux (N156HCN-EBA C7) panel is used for the device tree. BUG=b:296433986 TEST=On-screen text message seen during MRC training on Craask Logs: [NOTE ] MRC: no data in 'RW_MRC_CACHE' [SPEW ] bootmode is set to: 0 [0.171409] DP PHY mode status not complete [0.175509] DP PHY mode status not complete [0.179799] DP PHY mode status not complete [0.184087] DP PHY mode status not complete [0.188376] DP PHY mode status not complete [0.192665] DP PHY mode status not complete [0.196954] DP PHY mode status not complete [0.201243] DP PHY mode status not complete [0.205532] DP PHY mode status not complete [0.209821] DP PHY mode status not complete [0.214110] DP PHY mode status not complete [0.218397] DP PHY mode status not complete [INFO ] Informing user on-display of memory training. Change-Id: I33cfc5d1f8c25c344e598befd21c50a78a65275a Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78932 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/memlayout.ld')
0 files changed, 0 insertions, 0 deletions