diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-10-02 13:11:35 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-04 09:45:47 +0000 |
| commit | 5ed02e11b1553fd11aa07bfe6a5673b51a264896 (patch) | |
| tree | fbf402f4fbf2be82570c751e8feb169ca5b9e3aa /src/soc/nvidia/tegra124/include | |
| parent | 6a7f5845e7a83eff20b3663784f4029ea9f34c52 (diff) | |
soc/nvidia/tegra124: Increase bootblock size
Increase bootblock size by 4KiB and reduce romstage by 4 KiB.
Change-Id: I604fd9c63a4cf6fb7b18249a6d73cd637e184a71
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/28875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/nvidia/tegra124/include')
| -rw-r--r-- | src/soc/nvidia/tegra124/include/soc/memlayout.ld | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/memlayout.ld b/src/soc/nvidia/tegra124/include/soc/memlayout.ld index 6e596f35a7..615f05636d 100644 --- a/src/soc/nvidia/tegra124/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra124/include/soc/memlayout.ld @@ -31,9 +31,9 @@ SECTIONS PRERAM_CBFS_CACHE(0x40006000, 16K) VBOOT2_WORK(0x4000A000, 16K) STACK(0x4000E000, 8K) - BOOTBLOCK(0x40010000, 26K) - VERSTAGE(0x40016800, 72K) - ROMSTAGE(0x40028800, 93K) + BOOTBLOCK(0x40010000, 30K) + VERSTAGE(0x40017800, 72K) + ROMSTAGE(0x40029800, 89K) TIMESTAMP(0x4003FC00, 1K) SRAM_END(0x40040000) |