diff options
| author | Jimmy Zhang <jimmzhang@nvidia.com> | 2014-07-02 17:45:18 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-02-17 01:16:34 +0100 |
| commit | b365530bb6341cad601532e43fc899f56ba57acb (patch) | |
| tree | 4d936234624b6cbe9921c534823ea5469f4386d8 /src/soc/nvidia/tegra124/bootblock.c | |
| parent | b4fa3fd2aedc2d02c973c664a218e5551b4118a1 (diff) | |
tegra124: Correct cpu power on sequence and CPUPWRGOOD_TIME
Based on TRM, cpu clock enabling and reset vector setting should
all be done properly before ungating cpu power partition. Otherwise,
with current code, a race condition could occur where cpu starts but
reset vector has not been set.
BUG=chrome-os-partner:30064
BRANCH=none
TEST=run nyan_big reboot test. No issue is experienced.
Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Change-Id: I571e128693bb2763ee673bd183b8cf60921dc475
Original-Reviewed-on: https://chromium-review.googlesource.com/206682
Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Jimmy Zhang <jimmzhang@nvidia.com>
(cherry picked from commit 106480ff32406c899a24544fdfab858db5afd1d9)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I3da6018dd68e4c15d2c58db566a9745b0b26c365
Reviewed-on: http://review.coreboot.org/8414
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra124/bootblock.c')
| -rw-r--r-- | src/soc/nvidia/tegra124/bootblock.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c index 5f1e850a81..59001491ff 100644 --- a/src/soc/nvidia/tegra124/bootblock.c +++ b/src/soc/nvidia/tegra124/bootblock.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <assert.h> #include <arch/exception.h> #include <bootblock_common.h> #include <cbfs.h> @@ -69,16 +70,16 @@ void main(void) PINMUX_PWR_INT_N_FUNC_PMICINTR | PINMUX_INPUT_ENABLE); - power_enable_cpu_rail(); - power_ungate_cpu(); - if (IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE)) entry = (void *)verstage_vboot_main; else entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage"); - if (entry) - clock_cpu0_config_and_reset(entry); + ASSERT(entry); + clock_cpu0_config(entry); + + power_enable_and_ungate_cpu(); + clock_cpu0_remove_reset(); clock_halt_avp(); } |