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authorGabe Black <gabeblack@google.com>2013-09-26 16:22:09 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-08-05 18:44:53 +0200
commit396b0722978f9254a3d012210a89ccdead23a916 (patch)
treed4c05f76dcadc8cb0928c57bcb5e5fad17a0705d /src/soc/nvidia/tegra124/Kconfig
parent1ee2c6dbdfe7e35ab5e25a6136eab824ed2fec8f (diff)
tegra124: Add a stub implementation of the tegra124 SOC.
Most things still needs to be filled in, but this will allow us to build boards which use this SOC. Change-Id: Ic790685a78193ccb223f4d9355bd3db57812af39 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/170836 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 462456fd00164c10c80eff72240226a04445fe60) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6431 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/soc/nvidia/tegra124/Kconfig')
-rw-r--r--src/soc/nvidia/tegra124/Kconfig42
1 files changed, 42 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
new file mode 100644
index 0000000000..5d8fd4c878
--- /dev/null
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -0,0 +1,42 @@
+config SOC_NVIDIA_TEGRA124
+ depends on ARCH_ARMV7
+ bool
+ default n
+
+if SOC_NVIDIA_TEGRA124
+
+config BOOTBLOCK_CPU_INIT
+ string
+ default "soc/nvidia/tegra124/bootblock.c"
+ help
+ CPU/SoC-specific bootblock code. This is useful if the
+ bootblock must load microcode or copy data from ROM before
+ searching for the bootblock.
+
+# ROM image layout.
+#
+# 0x00000 Combined bootblock and BCT blob
+# 0x18000 Master CBFS header.
+# 0x18080 Free for CBFS data.
+
+config BOOTBLOCK_ROM_OFFSET
+ hex
+ default 0x0
+
+config CBFS_HEADER_ROM_OFFSET
+ hex "offset of master CBFS header in ROM"
+ default 0x18000
+
+config CBFS_ROM_OFFSET
+ hex "offset of CBFS data in ROM"
+ default 0x18080
+
+config SYS_SDRAM_BASE
+ hex
+ default 0x80000000
+
+config BOOTBLOCK_BASE
+ hex
+ default 0x80000000
+
+endif