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authorMaximilian Brune <maximilian.brune@9elements.com>2023-09-16 19:49:39 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2024-03-15 10:09:43 +0000
commitb3e336c51d02c678a4d15573f4edb5834f39bb36 (patch)
treece9cfaa161472fa337f9ed46d1e701cb15692fb2 /src/soc/mediatek
parent8627112424796e37f4b20e176cc7524c0db828bc (diff)
treewide: Move stdlib.h to commonlib
This patch moves commonlib/stdlib.h -> commonlib/bsd/stdlib.h, since all code is BSD licensed anyway. It also moves some code from libpayloads stdlib.h to commonlib/bsd/stdlib.h so that it can be shared with coreboot. This is useful for a subsequent commit that adds devicetree.c into commonlib. Also we don't support DMA on arm platforms in coreboot (only libpayload) therefore `dma_malloc()` has been removed and `dma_coherent()` has been moved to architecture specific functions. Any architecture that tries to use `dma_coherent()` now will get a compile time error. In order to not break current platforms like mb/google/herobrine which make use of the commonlib/storage/sdhci.c controller which in turn uses `dma_coherent` a stub has been added to arch/arm64/dma.c. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I3a7ab0d1ddcc7ce9af121a61b4d4eafc9e563a8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/77969 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/common/pcie.c2
-rw-r--r--src/soc/mediatek/mt8195/pcie.c1
2 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/mediatek/common/pcie.c b/src/soc/mediatek/common/pcie.c
index b3903a528a..10bece94d3 100644
--- a/src/soc/mediatek/common/pcie.c
+++ b/src/soc/mediatek/common/pcie.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <boot/coreboot_tables.h>
-#include <commonlib/stdlib.h>
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
@@ -15,7 +14,6 @@
#include <soc/pcie.h>
#include <soc/pcie_common.h>
#include <soc/soc_chip.h>
-#include <stdlib.h>
#include <types.h>
#define PCIE_SETTING_REG 0x80
diff --git a/src/soc/mediatek/mt8195/pcie.c b/src/soc/mediatek/mt8195/pcie.c
index c9f8ecd08b..cb36f8db0c 100644
--- a/src/soc/mediatek/mt8195/pcie.c
+++ b/src/soc/mediatek/mt8195/pcie.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
-#include <commonlib/stdlib.h>
#include <console/console.h>
#include <device/mmio.h>
#include <device/resource.h>