summaryrefslogtreecommitdiff
path: root/src/soc/mediatek
diff options
context:
space:
mode:
authorRunyang Chen <runyang.chen@mediatek.corp-partner.google.com>2024-10-26 15:31:36 +0800
committerYu-Ping Wu <yupingso@google.com>2024-11-06 04:00:26 +0000
commit379729b497746da7bdd9d207bc4903bdb4053046 (patch)
tree6699a892dec3bb3114e46bb58af6f787a80e9e44 /src/soc/mediatek
parentba0ac93452abd3db34bdfc9dd144ea51199d3d19 (diff)
soc/mediatek/mt8196: Disable irq2axi feature
Irq2axi translates wire-based interrupt into message signal interrupt. Since MT8196 uses legacy wire-based interrupt, this feature needs to be disabled. If the interrupt is not handled, it will cause the system fail to boot. TEST=Build pass, check irq2axi_disable log and the interrupt can be correctly handled by checking /proc/interrupts. BUG=b:317009620 Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-partner.google.com> Change-Id: I0e89a0ee75e574a4b9e8df0a0f6a5f6e03bba2d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/84896 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8196/Makefile.mk1
-rw-r--r--src/soc/mediatek/mt8196/include/soc/irq2axi.h18
-rw-r--r--src/soc/mediatek/mt8196/irq2axi.c18
3 files changed, 37 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index b73f213d6c..6b29e73fe7 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -19,6 +19,7 @@ bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
romstage-y += ../common/cbmem.c
romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c
romstage-y += emi.c
+romstage-y += irq2axi.c
romstage-y += l2c_ops.c
romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
diff --git a/src/soc/mediatek/mt8196/include/soc/irq2axi.h b/src/soc/mediatek/mt8196/include/soc/irq2axi.h
new file mode 100644
index 0000000000..22071e5098
--- /dev/null
+++ b/src/soc/mediatek/mt8196/include/soc/irq2axi.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8196_IRQ2AXI_H
+#define SOC_MEDIATEK_MT8196_IRQ2AXI_H
+
+#define IRQ2AXI_BASE 0x14413000
+#define IRQ2AXI_CFG1 (IRQ2AXI_BASE + 0x0004)
+
+#define APIFR_AO_IO_INTX_SEC_REG 0x101C9000
+#define CIRQ_AXI_MODE (APIFR_AO_IO_INTX_SEC_REG + 0x900)
+#define CIRQ_AXI_MODE_LEGACY 0x3
+
+#define MCUSYS_ACK_REG 0x0C00FFEC
+#define MCUSYS_ACK_CLR 0x1
+
+void irq2axi_disable(void);
+
+#endif /* SOC_MEDIATEK_MT8196_IRQ2AXI_H */
diff --git a/src/soc/mediatek/mt8196/irq2axi.c b/src/soc/mediatek/mt8196/irq2axi.c
new file mode 100644
index 0000000000..e0250a97f2
--- /dev/null
+++ b/src/soc/mediatek/mt8196/irq2axi.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <device/mmio.h>
+#include <soc/irq2axi.h>
+
+void irq2axi_disable(void)
+{
+ printk(BIOS_DEBUG, "%s\n", __func__);
+ /* disable IRQ2AXI */
+ write32p(IRQ2AXI_CFG1, 0x0);
+
+ /* disable mcusys ack */
+ clrbits32p(MCUSYS_ACK_REG, MCUSYS_ACK_CLR);
+
+ /* switch to legacy channel */
+ clrbits32p(CIRQ_AXI_MODE, CIRQ_AXI_MODE_LEGACY);
+}