diff options
author | Yu-Ping Wu <yupingso@chromium.org> | 2019-10-14 16:56:50 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-17 15:04:26 +0000 |
commit | e67dce0f9467340679950dab8fbe6dfe4f0ce1ba (patch) | |
tree | 2ccc25b14f95e7bb8b565ae0a936dd0e7b715064 /src/soc/mediatek | |
parent | 553e2db9514919c14df63de7a8bfbfdbfe3def1b (diff) |
soc/mediatek/mt8183: Verify checksum of cached calibration data
The checksum is stored in the header of calibration data and saved to
SPI flash. After reading the data from flash, checksum is used to verify
the integrity of the calibration parameters.
BUG=b:139099592
BRANCH=kukui
TEST=Calibration data successfully loaded from flash
Change-Id: Ie4a0688ed6e560d4c0c6b316f44e52fd10d71a9d
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r-- | src/soc/mediatek/mt8183/dramc_param.c | 1 | ||||
-rw-r--r-- | src/soc/mediatek/mt8183/memory.c | 17 |
2 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8183/dramc_param.c b/src/soc/mediatek/mt8183/dramc_param.c index ef3c19159f..bf1fee43a2 100644 --- a/src/soc/mediatek/mt8183/dramc_param.c +++ b/src/soc/mediatek/mt8183/dramc_param.c @@ -35,7 +35,6 @@ int validate_dramc_param(const void *blob) if (hdr->size != sizeof(*param)) return DRAMC_ERR_INVALID_SIZE; - /* TODO(hungte) Verify and check hdr->checksum. */ return DRAMC_SUCCESS; } diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c index 3d7668d702..e48c56437c 100644 --- a/src/soc/mediatek/mt8183/memory.c +++ b/src/soc/mediatek/mt8183/memory.c @@ -16,6 +16,7 @@ #include <assert.h> #include <cbfs.h> #include <console/console.h> +#include <ip_checksum.h> #include <soc/dramc_param.h> #include <soc/dramc_pi_api.h> #include <soc/emi.h> @@ -70,6 +71,12 @@ static void dump_param_header(const struct dramc_param *dparam) printk(BIOS_DEBUG, "header.checksum = %#x\n", header->checksum); } +static u32 compute_checksum(const struct dramc_param *dparam) +{ + return (u32)compute_ip_checksum(dparam->freq_params, + sizeof(dparam->freq_params)); +} + static int dram_run_fast_calibration(const struct dramc_param *dparam, u16 config) { @@ -88,6 +95,15 @@ static int dram_run_fast_calibration(const struct dramc_param *dparam, return -1; } + const u32 checksum = compute_checksum(dparam); + if (dparam->header.checksum != checksum) { + printk(BIOS_ERR, + "Invalid DRAM calibration checksum from flash " + "(expected: %#x, saved: %#x)\n", + checksum, dparam->header.checksum); + return -1; + } + return 0; } @@ -165,6 +181,7 @@ void mt_mem_init(struct dramc_param_ops *dparam_ops) printk(BIOS_INFO, "Successfully loaded DRAM blobs and " "ran DRAM calibration\n"); set_source_to_flash(dparam->freq_params); + dparam->header.checksum = compute_checksum(dparam); dparam_ops->write_to_flash(dparam); printk(BIOS_DEBUG, "Calibration params saved to flash: " "version=%#x, size=%#x\n", |