diff options
author | Nina Wu <nina-cm.wu@mediatek.com> | 2022-08-18 11:13:31 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-08-31 16:46:46 +0000 |
commit | c0797f50e12b2c01701663d603d4b0112988877d (patch) | |
tree | 87d821858fbb021d2c9fad6163cdcf591db90874 /src/soc/mediatek | |
parent | 297b6340623cf351ba219237e8e9d049e8c10c67 (diff) |
soc/mediatek/mt8188: Add DEVAPC basic driver
Add basic DEVAPC (device access permission control) driver.
DEVAPC driver is used to set up bus fabric security and data protection
among hardwares. DEVAPC driver groups the master hardwares into
different domains and gives secure and non-secure property. The slave
hardware can configure different access permissions for different
domains via DEVAPC driver.
1. Initialize DEVAPC.
2. Set master domain and secure side band.
3. Set default permission.
TEST=check logs of DEVAPC ok.
BUG=b:236331724
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Change-Id: Iad3569bc6f8ba032d478934ba839dc4b5387bafc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r-- | src/soc/mediatek/mt8188/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/mediatek/mt8188/devapc.c | 1606 | ||||
-rw-r--r-- | src/soc/mediatek/mt8188/include/soc/addressmap.h | 4 | ||||
-rw-r--r-- | src/soc/mediatek/mt8188/include/soc/devapc.h | 70 | ||||
-rw-r--r-- | src/soc/mediatek/mt8188/soc.c | 2 |
5 files changed, 1683 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc index ee677a3895..98a96cdd64 100644 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ b/src/soc/mediatek/mt8188/Makefile.inc @@ -29,6 +29,7 @@ romstage-y += ../common/pmif_spmi.c pmif_spmi.c romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c ramstage-y += ../common/auxadc.c +ramstage-y += ../common/devapc.c devapc.c ramstage-y += ../common/dfd.c ramstage-y += ../common/dpm.c ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c diff --git a/src/soc/mediatek/mt8188/devapc.c b/src/soc/mediatek/mt8188/devapc.c new file mode 100644 index 0000000000..1fe3cf8626 --- /dev/null +++ b/src/soc/mediatek/mt8188/devapc.c @@ -0,0 +1,1606 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <console/console.h> +#include <soc/devapc.h> +#include <soc/devapc_common.h> + +static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = { + /* 0 */ + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APMIXEDSYS_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APMIXEDSYS_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TINSYS_AO_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TOPCKGEN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("INFRACFG_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("INFRACFG_AO_MEM_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_INFRA_AO_SYS0_ATTR("PERICFG_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("GPIO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TOPRGU_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DSP_IRQ_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DEVICE_APC_INFRA_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("BCRM_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DEBUG_CTRL_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("AP_CIRQ_EINT_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PMIC_WRAP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("KP_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_INFRA_AO_SYS0_ATTR("TOP_MISC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DVFSRC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MBIST_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("HDMI_CEC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("HDMI_EDID_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("HDMI_SCDC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("IRRX_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SYS_TIMER_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MODEM_TEMP_SHARE_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PMIF1_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_INFRA_AO_SYS0_ATTR("PMICSPI_MST_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TIA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("TOPCKGEN_INFRA_CFG_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DRM_DEBUG_TOP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("EFUSE_DEBUG_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APXGPT_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SEJ_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("AES_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SECURITY_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SPMI_MST_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_INFRA_AO_SYS0_ATTR("DEBUG_CTRL_FMEM_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("BCRM_FMEM_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("DEVICE_APC_FMEM_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PWM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PMSR_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("SRCLKEN_RC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-3", + NO_PROTECTION, FORBIDDEN15), + /* 50 */ + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-5", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-6", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-7", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MFG_S_S-8", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-4", + NO_PROTECTION, FORBIDDEN15), + /* 60 */ + DAPC_INFRA_AO_SYS0_ATTR("APU_S_S-5", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("L3C_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("L3C_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("L3C_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("PCIE0_AXI_S", + NO_PROTECTION, FORBIDDEN15), + /* 70 */ + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB4_S", + NO_PROTECTION, FORBIDDEN15), +}; + +static const struct apc_infra_peri_dom_4 infra_ao_sys1_devices[] = { + /* 0 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-1", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-2", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-3", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-4", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-5", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-6", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-7", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-8", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-9", + NO_PROTECTION, FORBIDDEN3), + /* 10 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-10", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-11", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-12", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-13", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-14", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-15", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-16", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-17", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-18", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-19", + NO_PROTECTION, FORBIDDEN3), + /* 20 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-20", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-21", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-22", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-23", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-24", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-25", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-26", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-27", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-28", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-29", + NO_PROTECTION, FORBIDDEN3), + /* 30 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-30", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-31", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-32", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-33", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-34", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-35", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-36", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-37", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-38", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-39", + NO_PROTECTION, FORBIDDEN3), + /* 40 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-40", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-41", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-42", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-43", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-44", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-45", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-46", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-47", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-48", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-49", + NO_PROTECTION, FORBIDDEN3), + /* 50 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-50", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-51", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-52", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-53", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-54", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-55", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-56", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-57", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-58", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-59", + NO_PROTECTION, FORBIDDEN3), + /* 60 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-60", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-61", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-62", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-63", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-64", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-65", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-66", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-67", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-68", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-69", + NO_PROTECTION, FORBIDDEN3), + /* 70 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-70", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-71", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-72", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-73", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-74", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-75", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-76", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-77", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-78", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-79", + NO_PROTECTION, FORBIDDEN3), + /* 80 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-80", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-81", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-82", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-83", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-84", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-85", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-86", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-87", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-88", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-89", + NO_PROTECTION, FORBIDDEN3), + /* 90 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-90", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-91", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-92", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-93", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-94", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-95", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-96", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-97", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-98", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-99", + NO_PROTECTION, FORBIDDEN3), + /* 100 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-100", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-101", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-102", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-103", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-104", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-105", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-106", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-107", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-108", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-109", + NO_PROTECTION, FORBIDDEN3), + /* 110 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-110", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-111", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-112", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-113", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-114", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-115", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-116", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-117", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-118", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-119", + NO_PROTECTION, FORBIDDEN3), + /* 120 */ + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-120", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-121", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-122", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-1", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-2", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-3", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-4", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-5", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-6", + NO_PROTECTION, FORBIDDEN3), + /* 130 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-7", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-8", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-9", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-10", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-11", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-12", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-13", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-14", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-15", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-16", + NO_PROTECTION, FORBIDDEN3), + /* 140 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-17", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-18", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-19", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-20", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-21", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-22", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-23", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-24", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-25", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-26", + NO_PROTECTION, FORBIDDEN3), + /* 150 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-27", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-28", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-29", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-30", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-31", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-32", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-33", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-34", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-35", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-36", + NO_PROTECTION, FORBIDDEN3), + /* 160 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-37", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-38", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-39", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-40", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-41", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-42", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-43", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-44", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-45", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-46", + NO_PROTECTION, FORBIDDEN3), + /* 170 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-47", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-48", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-49", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-50", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-51", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-52", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-53", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-54", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-55", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-56", + NO_PROTECTION, FORBIDDEN3), + /* 180 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-57", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-58", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-59", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-60", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-61", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-62", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-63", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-64", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-65", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-66", + NO_PROTECTION, FORBIDDEN3), + /* 190 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-67", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-68", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-69", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-70", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-71", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-72", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-73", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-74", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-75", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-76", + NO_PROTECTION, FORBIDDEN3), + /* 200 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-77", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-78", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-79", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-86", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-88", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-94", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-95", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-96", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-97", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-98", + NO_PROTECTION, FORBIDDEN3), + /* 210 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-99", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-101", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-102", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-103", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-104", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-106", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-107", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-108", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-109", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-110", + NO_PROTECTION, FORBIDDEN3), + /* 220 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-111", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-114", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-115", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-116", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-117", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-119", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-121", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-122", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-123", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-125", + NO_PROTECTION, FORBIDDEN3), + /* 230 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-126", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-127", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-128", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-129", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-130", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-131", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-132", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-133", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-134", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-135", + NO_PROTECTION, FORBIDDEN3), + /* 240 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-136", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-137", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-138", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-140", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-141", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-142", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-143", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-144", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-145", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-146", + NO_PROTECTION, FORBIDDEN3), + /* 250 */ + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-147", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-148", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-149", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-150", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-151", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS1_ATTR("MDP_S_S-152", + NO_PROTECTION, FORBIDDEN3), +}; + +static const struct apc_infra_peri_dom_4 infra_ao_sys2_devices[] = { + /* 0 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-153", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-154", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-155", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-156", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-157", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-158", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-159", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-160", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-161", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-163", + NO_PROTECTION, FORBIDDEN3), + /* 10 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-164", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-165", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-166", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-167", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-168", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-169", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-170", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-171", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-172", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-173", + NO_PROTECTION, FORBIDDEN3), + /* 20 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-174", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-176", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-177", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-178", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-179", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-181", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-182", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-183", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-184", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-186", + NO_PROTECTION, FORBIDDEN3), + /* 30 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-187", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-188", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-189", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-190", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-191", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-192", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-193", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-194", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-195", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-196", + NO_PROTECTION, FORBIDDEN3), + /* 40 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-197", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-198", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-199", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-200", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-201", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-202", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-203", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-204", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-205", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-207", + NO_PROTECTION, FORBIDDEN3), + /* 50 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-208", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-209", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-210", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-211", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-212", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-213", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-215", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-216", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-217", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-218", + NO_PROTECTION, FORBIDDEN3), + /* 60 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-219", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-220", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-221", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-222", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-224", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-225", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-226", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-227", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-228", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-229", + NO_PROTECTION, FORBIDDEN3), + /* 70 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-230", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-231", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-232", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-233", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-234", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-235", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-236", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-237", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-238", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-239", + NO_PROTECTION, FORBIDDEN3), + /* 80 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-240", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-242", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-243", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-244", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-246", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-247", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-249", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-250", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-251", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-253", + NO_PROTECTION, FORBIDDEN3), + /* 90 */ + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-254", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-256", + NO_PROTECTION, FORBIDDEN3), + DAPC_INFRA_AO_SYS2_ATTR("MDP_S_S-257", + NO_PROTECTION, FORBIDDEN3), +}; + +static const struct apc_infra_peri_dom_16 peri_ao_sys0_devices[] = { + /* 0 */ + DAPC_PERI_AO_SYS0_ATTR("DEVICE_APC_PERI_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("BCRM_PERI_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DEBUG_CTRL_PERI_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-5", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-6", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-7", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-8", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-9", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-10", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DEBUGSYS_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S0_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S1_APB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP5_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP6_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF2_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF2_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF3_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 50 */ + DAPC_PERI_AO_SYS0_ATTR("CCIF3_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF4_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF4_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF5_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("CCIF5_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("SSC_INFRA_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("SSC_INFRA_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_AO_SYS0_ATTR("DEVICE_MPU_ACP_APB_S", + SEC_RW_ONLY, FORBIDDEN15), +}; + +static const struct apc_infra_peri_dom_8 peri_ao_sys1_devices[] = { + /* 0 */ + DAPC_PERI_AO_SYS1_ATTR("TINSYS_S", + NO_PROTECTION, FORBIDDEN7), +}; + +static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = { + /* 0 */ + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_PERI_AO2_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_PERI_AO2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_CTRL_PERI_AO2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB6_S", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB10_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB11_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB12_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB13_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB14_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB15_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB0_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB6_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_WEST_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB0_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB6_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB10_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB11_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB12_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB13_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB14_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_NORTH_APB15_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB4_S", + NO_PROTECTION, FORBIDDEN15), + /* 50 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB6_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB7_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB8_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB9_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB10_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB11_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB12_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB13_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB14_S", + NO_PROTECTION, FORBIDDEN15), + /* 60 */ + DAPC_PERI2_AO_SYS0_ATTR("BND_SOUTH_APB15_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_NORTH_APB5_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SYS_CIRQ_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_INFRA_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_TRACKER_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 70 */ + DAPC_PERI2_AO_SYS0_ATTR("CCIF0_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CCIF0_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CCIF1_AP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CCIF1_MD_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("MBIST_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("TRNG_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCPU_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCPU_NS_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("CQ_DMA_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 80 */ + DAPC_PERI2_AO_SYS0_ATTR("SRAMROM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_MEM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("ECC_TOP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCE_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("GCE_M2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SYS_CIRQ1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SYS_CIRQ2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_TRACKER_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB1_S", + NO_PROTECTION, FORBIDDEN15), + /* 90 */ + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB4_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("EMI_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_MPU_PDN_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("APDMA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_TRACKER_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_INFRA_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_PERI_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 100 */ + DAPC_PERI2_AO_SYS0_ATTR("BCRM_PERI_PDN2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_PERI_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_PERI_PDN2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_FMEM_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("FAKE_ENGINE_1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("FAKE_ENGINE_0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("PERI_SLOW_M_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("EMI_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_SUB_INFRA_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_MPU_PDN_SUB_INFRA_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + /* 110 */ + DAPC_PERI2_AO_SYS0_ATTR("MBIST_PDN_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_MEM_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_SUB_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("DEBUG_CTRL_SUB_INFRA_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("BCRM_SUB_INFRA_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SSC_SUB_INFRA_APB1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SSC_SUB_INFRA_APB2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_AO_MEM_SUB_INFRA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SUB_FAKE_ENGINE_MM_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI2_AO_SYS0_ATTR("SUB_FAKE_ENGINE_MDP_S", + NO_PROTECTION, FORBIDDEN15), + /* 120 */ + DAPC_PERI2_AO_SYS0_ATTR("DEVICE_APC_SUB_INFRA_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), +}; + +static const struct apc_infra_peri_dom_16 peri_par_ao_sys0_devices[] = { + /* 0 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("SCP_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SCP_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SCP_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SCP_S-3", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SCP_S-4", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SCP_S-5", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_S-1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_S-2", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("NOR_AXI_S", + NO_PROTECTION, FORBIDDEN15), + /* 10 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC0_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC1_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PCIE0_AHB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_P2_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_P3_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("AUXADC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("UART2_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 20 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("UART3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("dummy_0", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("dummy_1", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PTP_THERM_CTRL_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PERI_MBIST_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DISP_PWM_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DISP_PWM1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SNPS_MAC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI1_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 30 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI3_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI4_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPI5_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPIS0_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("SPIS1_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("NFI_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("NFIECC_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("I2S_DMA_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("I2S_DMA1_APB_S", + NO_PROTECTION, FORBIDDEN15), + /* 40 */ + DAPC_PERI_PAR_AO_SYS0_ATTR("BCRM_PERI_PAR_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DEVICE_APC_PERI_PAR_PDN_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PTP_THERM_CTRL2_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("IIC_P2P_REMAP_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("NOR_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("PERICFG2_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DEVICE_APC_PERI_PAR_AO_APB_S", + SEC_RW_ONLY, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("DEBUG_CTRL_PERI_PAR_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), + DAPC_PERI_PAR_AO_SYS0_ATTR("BCRM_PERI_PAR_AO_APB_S", + NO_PROTECTION, FORBIDDEN15), +}; + +static const enum domain_id domain_map[] = { + DOMAIN_0, DOMAIN_1, DOMAIN_2, DOMAIN_3, DOMAIN_4, DOMAIN_5, DOMAIN_6, DOMAIN_7, + DOMAIN_8, DOMAIN_9, DOMAIN_10, DOMAIN_11, DOMAIN_12, DOMAIN_13, DOMAIN_14, DOMAIN_15, +}; + +static void set_infra_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(infra_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(infra_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + infra_ao_sys0_devices[i].d_permission[j]); + + for (i = 0; i < ARRAY_SIZE(infra_ao_sys1_devices); i++) + for (j = 0; j < ARRAY_SIZE(infra_ao_sys1_devices[i].d_permission); j++) + set_module_apc(base + SYS1_D0_APC_0, i, domain_map[j], + infra_ao_sys1_devices[i].d_permission[j]); + + for (i = 0; i < ARRAY_SIZE(infra_ao_sys2_devices); i++) + for (j = 0; j < ARRAY_SIZE(infra_ao_sys2_devices[i].d_permission); j++) + set_module_apc(base + SYS2_D0_APC_0, i, domain_map[j], + infra_ao_sys2_devices[i].d_permission[j]); + +} + +static void set_peri_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(peri_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + peri_ao_sys0_devices[i].d_permission[j]); + + /* + * Extra apc setting. + * Block debugsys to avoid privilege escalation. + */ + if (!CONFIG(CONSOLE_SERIAL)) + set_module_apc(base + SYS0_D0_APC_0, DEVAPC_DEBUGSYS_INDEX, + DOMAIN_0, SEC_RW_NS_R); + + for (i = 0; i < ARRAY_SIZE(peri_ao_sys1_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri_ao_sys1_devices[i].d_permission); j++) + set_module_apc(base + SYS1_D0_APC_0, i, domain_map[j], + peri_ao_sys1_devices[i].d_permission[j]); + +} + +static void set_peri2_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(peri2_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri2_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + peri2_ao_sys0_devices[i].d_permission[j]); + +} + +static void set_peri_par_ao_apc(uintptr_t base) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(peri_par_ao_sys0_devices); i++) + for (j = 0; j < ARRAY_SIZE(peri_par_ao_sys0_devices[i].d_permission); j++) + set_module_apc(base + SYS0_D0_APC_0, i, domain_map[j], + peri_par_ao_sys0_devices[i].d_permission[j]); + +} + +static void dump_infra_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(infra_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_INFRA_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO_SYS0)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(infra_ao_sys1_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_INFRA_AO_SYS1; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO_SYS1)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS1_D0_APC_0, d, i))); + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(infra_ao_sys2_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_INFRA_AO_SYS2; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO_SYS2)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS2_D0_APC_0, d, i))); + + printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO)MAS_SEC_0: %#x\n", + read32(getreg(base, MAS_SEC_0))); +} + +static void dump_peri_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI_AO_SYS0)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri_ao_sys1_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI_AO_SYS1; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI_AO_SYS1)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS1_D0_APC_0, d, i))); + + printk(BIOS_DEBUG, "[DEVAPC] (PERI_AO)MAS_SEC_0: %#x\n", + read32(getreg(base, MAS_SEC_0))); +} + +static void dump_peri2_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri2_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI2_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI2_AO_SYS0)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + +} + +static void dump_peri_par_ao_apc(uintptr_t base) +{ + int reg_max; + int d, i; + + reg_max = DIV_ROUND_UP(ARRAY_SIZE(peri_par_ao_sys0_devices), MOD_NO_IN_1_DEVAPC); + for (d = 0; d < DOM_NUM_PERI_PAR_AO_SYS0; d++) + for (i = 0; i < reg_max; i++) + printk(BIOS_DEBUG, "[DEVAPC] (PERI_PAR_AO_SYS0)D%d_APC_%d: %#x\n", d, + i, read32(getreg_domain(base, SYS0_D0_APC_0, d, i))); + + printk(BIOS_DEBUG, "[DEVAPC] (PERI_PAR_AO)MAS_SEC_0: %#x\n", + read32(getreg(base, MAS_SEC_0))); +} + +static void infra_init(uintptr_t base) +{ + /* Default APC setting */ + set_infra_ao_apc(base); +} + +static void peri_init(uintptr_t base) +{ + /* Default APC setting */ + set_peri_ao_apc(base); +} + +static void peri2_init(uintptr_t base) +{ + /* Default APC setting */ + set_peri2_ao_apc(base); +} + +static void peri_par_init(uintptr_t base) +{ + /* Default APC setting */ + set_peri_par_ao_apc(base); +} + +struct devapc_init_ops { + uintptr_t base; + void (*init)(uintptr_t base); + void (*dump)(uintptr_t base); +} devapc_init[] = { + { DEVAPC_INFRA_AO_BASE, infra_init, dump_infra_ao_apc }, + { DEVAPC_PERI_AO_BASE, peri_init, dump_peri_ao_apc }, + { DEVAPC_PERI2_AO_BASE, peri2_init, dump_peri2_ao_apc }, + { DEVAPC_PERI_PAR_AO_BASE, peri_par_init, dump_peri_par_ao_apc }, +}; + +void dapc_init(void) +{ + int i; + uintptr_t devapc_ao_base; + + for (i = 0; i < ARRAY_SIZE(devapc_init); i++) { + devapc_ao_base = devapc_init[i].base; + + /* Init dapc */ + write32(getreg(devapc_ao_base, AO_APC_CON), 0x0); + write32(getreg(devapc_ao_base, AO_APC_CON), 0x1); + + /* Initialization */ + if (devapc_init[i].init) + devapc_init[i].init(devapc_ao_base); + + /* Dump setting */ + if (devapc_init[i].dump) + devapc_init[i].dump(devapc_ao_base); + } +} diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h index fa773b4327..55a1497f49 100644 --- a/src/soc/mediatek/mt8188/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h @@ -31,6 +31,10 @@ enum { PMICSPI_MST_BASE = IO_PHYS + 0x00025000, PMIF_SPMI_BASE = IO_PHYS + 0x00027000, SPMI_MST_BASE = IO_PHYS + 0x00029000, + DEVAPC_INFRA_AO_BASE = IO_PHYS + 0x00030000, + DEVAPC_PERI_AO_BASE = IO_PHYS + 0x00034000, + DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000, + DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000, DBG_TRACKER_BASE = IO_PHYS + 0x00208000, PERI_TRACKER_BASE = IO_PHYS + 0x00218000, EMI0_BASE = IO_PHYS + 0x00219000, diff --git a/src/soc/mediatek/mt8188/include/soc/devapc.h b/src/soc/mediatek/mt8188/include/soc/devapc.h new file mode 100644 index 0000000000..e0b0f00ccf --- /dev/null +++ b/src/soc/mediatek/mt8188/include/soc/devapc.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef SOC_MEDIATEK_MT8188_DEVAPC_H +#define SOC_MEDIATEK_MT8188_DEVAPC_H + +#include <device/mmio.h> +#include <soc/addressmap.h> + +void dapc_init(void); + +enum devapc_ao_offset { + SYS0_D0_APC_0 = 0x00000, + SYS1_D0_APC_0 = 0x01000, + SYS2_D0_APC_0 = 0x02000, + MAS_DOM_0 = 0x00900, + MAS_SEC_0 = 0x00A00, + AO_APC_CON = 0x00F00, +}; + +/****************************************************************************** + * STRUCTURE DEFINITION + ******************************************************************************/ +struct apc_infra_peri_dom_16 { + unsigned char d_permission[16]; +}; + +struct apc_infra_peri_dom_8 { + unsigned char d_permission[8]; +}; + +struct apc_infra_peri_dom_4 { + unsigned char d_permission[4]; +}; + +enum devapc_sys_dom_num { + DOM_NUM_INFRA_AO_SYS0 = 16, + DOM_NUM_INFRA_AO_SYS1 = 4, + DOM_NUM_INFRA_AO_SYS2 = 4, + DOM_NUM_PERI_AO_SYS0 = 16, + DOM_NUM_PERI_AO_SYS1 = 8, + DOM_NUM_PERI2_AO_SYS0 = 16, + DOM_NUM_PERI_PAR_AO_SYS0 = 16, +}; + +enum devapc_cfg_index { + DEVAPC_DEBUGSYS_INDEX = 14, +}; + +/* PERM_ATTR MACRO */ +#define DAPC_INFRA_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } } +#define DAPC_INFRA_AO_SYS1_ATTR(...) { { DAPC_PERM_ATTR_4(__VA_ARGS__) } } +#define DAPC_INFRA_AO_SYS2_ATTR(...) { { DAPC_PERM_ATTR_4(__VA_ARGS__) } } +#define DAPC_PERI_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } } +#define DAPC_PERI_AO_SYS1_ATTR(...) { { DAPC_PERM_ATTR_8(__VA_ARGS__) } } +#define DAPC_PERI2_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } } +#define DAPC_PERI_PAR_AO_SYS0_ATTR(...) { { DAPC_PERM_ATTR_16(__VA_ARGS__) } } + +/****************************************************************************** + * Variable DEFINITION + ******************************************************************************/ +#define MOD_NO_IN_1_DEVAPC 16 +#define DOMAIN_OFT 0x40 +#define IDX_OFT 0x4 + +/****************************************************************************** + * Bit Field DEFINITION + ******************************************************************************/ + /* TODO */ + +#endif /* SOC_MEDIATEK_MT8188_DEVAPC_H */ diff --git a/src/soc/mediatek/mt8188/soc.c b/src/soc/mediatek/mt8188/soc.c index dc04e29faa..e80fc0d9ab 100644 --- a/src/soc/mediatek/mt8188/soc.c +++ b/src/soc/mediatek/mt8188/soc.c @@ -3,6 +3,7 @@ #include <bootmem.h> #include <console/console.h> #include <device/device.h> +#include <soc/devapc.h> #include <soc/dfd.h> #include <soc/dpm.h> #include <soc/emi.h> @@ -25,6 +26,7 @@ static void soc_read_resources(struct device *dev) static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); + dapc_init(); mcupm_init(); sspm_init(); |