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authorYu-Ping Wu <yupingso@chromium.org>2022-07-19 17:09:39 +0800
committerYu-Ping Wu <yupingso@google.com>2022-07-27 13:00:05 +0000
commit3b9d6a41b30241e9709e27b267ae1d5f154e4287 (patch)
treee4972bc6e5f5fd7d6abab93ea0d42ae7d2497093 /src/soc/mediatek
parent7b7250dfaec967fd16dee641e1eb7943bf54a2c3 (diff)
soc/mediatek/mt8195: Skip PCIe ops for eMMC SKUs
To avoid unnecessary PCIe early initialization for non-NVMe devices (which would take about 150ms on dojo), skip setting PCIe ops when initializing mt8195 SoC. BUG=b:238850212 TEST=emerge-cherry coreboot TEST=Dojo SKU1 (eMMC) boot time <= 1s BRANCH=cherry Change-Id: I8945890ba422c0c4eb42683935220b7afbb80dfd Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65993 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8195/soc.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8195/soc.c b/src/soc/mediatek/mt8195/soc.c
index 002fcddf2e..1aec0ded71 100644
--- a/src/soc/mediatek/mt8195/soc.c
+++ b/src/soc/mediatek/mt8195/soc.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootmem.h>
+#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <soc/apusys.h>
@@ -58,8 +59,12 @@ static void enable_soc_dev(struct device *dev)
{
if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
dev->ops = &soc_ops;
- else if (dev->path.type == DEVICE_PATH_DOMAIN)
- dev->ops = &pci_domain_ops;
+ else if (dev->path.type == DEVICE_PATH_DOMAIN) {
+ if (mainboard_needs_pcie_init())
+ dev->ops = &pci_domain_ops;
+ else
+ printk(BIOS_DEBUG, "Skip setting PCIe ops\n");
+ }
}
struct chip_operations soc_mediatek_mt8195_ops = {