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authorHuayang Duan <huayang.duan@mediatek.com>2020-07-23 13:53:39 +0800
committerHung-Te Lin <hungte@chromium.org>2020-08-12 02:50:59 +0000
commit6e57b1cf6dc64c845eeed9de768091de55da00ad (patch)
tree0d443cda177b2cdb8575567d887a5ebb481c19b6 /src/soc/mediatek
parent7fe005ff30177db96d2ad31742404ac91330700e (diff)
soc/mediatek/mt8183: Transfer ddr geometry type to dram blob
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui Change-Id: I3a677195f5036321939c60c8f9f1bace7c4a2e3f Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43796 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8183/memory.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c
index ff30f67538..6b80a43a8c 100644
--- a/src/soc/mediatek/mt8183/memory.c
+++ b/src/soc/mediatek/mt8183/memory.c
@@ -97,7 +97,8 @@ static int dram_run_fast_calibration(const struct dramc_param *dparam,
return 0;
}
-static int dram_run_full_calibration(struct dramc_param *dparam, u16 config)
+static int dram_run_full_calibration(struct dramc_param *dparam,
+ u32 ddr_geometry, u16 config)
{
initialize_dramc_param(dparam, config);
@@ -111,6 +112,8 @@ static int dram_run_full_calibration(struct dramc_param *dparam, u16 config)
return -2;
dparam->do_putc = do_putchar;
+ dparam->freq_params[0].ddr_geometry = ddr_geometry;
+ printk(BIOS_INFO, "ddr_geometry: %d, config: %#x\n", ddr_geometry, config);
prog_set_entry(&dram, prog_entry(&dram), dparam);
prog_run(&dram);
@@ -184,9 +187,11 @@ static void mt_mem_init_run(struct dramc_param_ops *dparam_ops)
"Failed to read calibration data from flash\n");
}
+ const struct sdram_params *sdram_cfg = get_sdram_config();
+
/* Run full calibration */
printk(BIOS_INFO, "DRAM-K: Full Calibration\n");
- int err = dram_run_full_calibration(dparam, config);
+ int err = dram_run_full_calibration(dparam, sdram_cfg->ddr_geometry, config);
if (err == 0) {
printk(BIOS_INFO, "Successfully loaded DRAM blobs and "
"ran DRAM calibration\n");
@@ -211,7 +216,7 @@ static void mt_mem_init_run(struct dramc_param_ops *dparam_ops)
/* Init params from sdram configs and run partial calibration */
printk(BIOS_INFO, "DRAM-K: Partial Calibration\n");
- init_sdram_params(dparam->freq_params, get_sdram_config());
+ init_sdram_params(dparam->freq_params, sdram_cfg);
if (mt_set_emi(dparam) != 0)
die("Set emi failed with params from sdram config\n");
if (mt_mem_test() != 0)