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authorJarried Lin <jarried.lin@mediatek.corp-partner.google.com>2024-08-16 10:33:17 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-08-24 13:00:04 +0000
commit6c8974b5c746b37e31365d511c7499c3e5887cb8 (patch)
tree5bcde54b9acd327592f9438fcb8f8052d922f10e /src/soc/mediatek/mt8196/soc.c
parentabf34584dbfecdd74db36dd24f6008d1051a96a9 (diff)
soc/mediatek/mt8196: Enable MMU operation for L2C SRAM and DMA
- Turn off L2C SRAM and reconfigure as L2 cache: Mediatek SoC uses part of the L2 cache as SRAM before DRAM is ready. After DRAM is ready, we should invoke disable_l2c_sram to reconfigure the L2C SRAM as L2 cache. - Configure DMA buffer in DRAM: Set DRAM DMA to be non-cacheable to load blob correctly. TEST=build pass, register(disable_l2c) read ok BUG=b:317009620 Change-Id: I6a3cb63d3418f085f5d8d08b282dd59ea431c294 Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83925 Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8196/soc.c')
-rw-r--r--src/soc/mediatek/mt8196/soc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c
index b77735ceed..b62c055426 100644
--- a/src/soc/mediatek/mt8196/soc.c
+++ b/src/soc/mediatek/mt8196/soc.c
@@ -2,6 +2,7 @@
#include <device/device.h>
#include <soc/emi.h>
+#include <soc/mmu_operations.h>
#include <symbols.h>
static void soc_read_resources(struct device *dev)
@@ -11,6 +12,7 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev)
{
+ mtk_mmu_disable_l2c_sram();
}
static struct device_operations soc_ops = {