diff options
| author | Jarried Lin <jarried.lin@mediatek.corp-partner.google.com> | 2024-11-01 15:19:43 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2024-11-21 13:46:24 +0000 |
| commit | 992e09a1d5e0501711ee76083d9d00828fcbddd7 (patch) | |
| tree | a3d636d70852360548ba8d01752671779701a801 /src/soc/mediatek/mt8196/Makefile.mk | |
| parent | 8bada5dcb026b0ac27624b9547020b145fee1831 (diff) | |
soc/mediatek/mt8196: Add version two DPM driver
Add version two of the DPM driver for DVFS and DRAM low power feature.
MT8196 equips new DPM hardware which is different from precedent SoCs.
Therefore, we implement a new DPM loader (said version 2) to run the
blob. The new DPM driver includes following features.
- Simplify the DPM loading flow without the needs of waking DPM SRAM up
and initializing bootargs.
- Use the broadcast function to ensure that the DPM load and reset
operations performed on channel A will be synchronized to the other
three channels.
TEST=Full calibration pass.
BUG=b:317009620
Change-Id: I77e1ac252b00ab9c4864cc308f20da4a79714e4c
Signed-off-by: Crystal Guo <crystal.guo@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85121
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8196/Makefile.mk')
| -rw-r--r-- | src/soc/mediatek/mt8196/Makefile.mk | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 3a1d103a8e..c0b491452e 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -29,9 +29,11 @@ romstage-y += ../common/memory.c memory.c romstage-y += ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-y += ../common/dpm_v2.c ramstage-y += ../common/early_init.c ramstage-y += ../common/emi.c ramstage-y += l2c_ops.c +ramstage-y += ../common/mcu.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-$(CONFIG_PCI) += ../common/pcie.c pcie.c ramstage-y += soc.c @@ -42,6 +44,17 @@ CPPFLAGS_common += -Isrc/soc/mediatek/common/include MT8196_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8196 +mcu-firmware-files := \ + $(CONFIG_DPM_DM_FIRMWARE) \ + $(CONFIG_DPM_PM_FIRMWARE) + +$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ + $(eval $(fw)-file := $(MT8196_BLOB_DIR)/$(fw)) \ + $(eval $(fw)-type := raw) \ + $(eval $(fw)-compression := LZ4) \ + $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ +) + DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram $(DRAM_CBFS)-file := $(MT8196_BLOB_DIR)/dram.elf $(DRAM_CBFS)-type := stage |