diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-01-28 23:40:00 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-02-02 07:38:22 +0000 |
| commit | 7ef471c67acfc4775efbd97590b931759c478380 (patch) | |
| tree | d54153d352757b0a6d310431e343f7c407c970e6 /src/soc/mediatek/mt8195 | |
| parent | ce70f0b699c76440fc042226640853a03f8eb413 (diff) | |
soc/intel/tigerlake: Use PMC IPC to disable HECI1
This patch allows common CSE block to disable HECI1 device using PMC
IPC command `0xA9`.
Select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC config for
Tiger Lake to disable HECI1 device using PMC IPC.
Additionally, remove dead code that deals with HECI1 disabling using
in SMM as HECI1 disabling using PMC IPC is simpler solution.
BUG=none
TEST=None
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Id5f1e3f622f65cd0f892c0dc541625bfd50d038e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8195')
0 files changed, 0 insertions, 0 deletions