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authorYidi Lin <yidi.lin@mediatek.com>2021-02-04 18:30:54 +0800
committerHung-Te Lin <hungte@chromium.org>2021-04-26 02:43:06 +0000
commit03e002f64d5742039b8d3df2cfb3142ba9bc5b3a (patch)
tree451b34a934896d5a6e7f7bb748d9ea980f84e743 /src/soc/mediatek/mt8195/timer.c
parent49b47eab8116b7a0040635fe7d3d31100c0bdb46 (diff)
soc/mediatek/mt8195: Add timer support
TEST=emerge-{oak, kukui, asurada, cherry} coreboot; verified on Asurada and Cherry P0 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: Ic6a87e7d5983bf14ad123de82ed670a22a7be1aa Reviewed-on: https://review.coreboot.org/c/coreboot/+/52541 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/timer.c')
-rw-r--r--src/soc/mediatek/mt8195/timer.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/timer.c b/src/soc/mediatek/mt8195/timer.c
new file mode 100644
index 0000000000..3fb4be7f2d
--- /dev/null
+++ b/src/soc/mediatek/mt8195/timer.c
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/timer.h>
+
+void timer_prepare(void)
+{
+ clrbits32((void *)SYSTIMER_BASE, COMP_FEATURE_MASK);
+ setbits32((void *)SYSTIMER_BASE, COMP_25_MASK);
+}