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authorYidi Lin <yidilin@chromium.org>2024-09-05 17:10:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-09-12 16:57:11 +0000
commitf3b698462975a5b23004affca45a6dd1a3ff46a6 (patch)
treea94a1af1b963d6140081e5c4b8c2e4d50304d974 /src/soc/mediatek/mt8195/spi.c
parentffc48178de6eee2e4efd33b4943f922475badc71 (diff)
soc/mediatek: Remove redundant struct pad_func and PAD_* definitions
Clean up redundant `struct pad_func` and `PAD_*` definitions. This patch also refactors the PAD_* macros by, - Repurposing PAD_FUNC and dropping PAD_FUNC_SEL. - Adding PAD_FUNC_DOWN and PAD_FUNC_UP to avoid the implicit initialization. BUG=none TEST=emerge-{elm, kukui, asurada, cherry, corsola, geralt, rauru} coreboot Change-Id: I12b8f6749015bff52988208a7c3aa01e952612c6 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84222 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/spi.c')
-rw-r--r--src/soc/mediatek/mt8195/spi.c46
1 files changed, 19 insertions, 27 deletions
diff --git a/src/soc/mediatek/mt8195/spi.c b/src/soc/mediatek/mt8195/spi.c
index 98b0d54a08..6307ff8fae 100644
--- a/src/soc/mediatek/mt8195/spi.c
+++ b/src/soc/mediatek/mt8195/spi.c
@@ -34,50 +34,42 @@ struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = {
},
};
-struct pad_func {
- u8 pin_id;
- u8 func;
-};
-
-#define PAD_FUNC(name, func) {PAD_##name##_ID, PAD_##name##_FUNC_##func}
-#define PAD_FUNC_GPIO(name) {PAD_##name##_ID, 0}
-
static const struct pad_func pad0_funcs[SPI_BUS_NUMBER][4] = {
{
- PAD_FUNC(SPIM0_MI, SPIM0_MI),
+ PAD_FUNC_DOWN(SPIM0_MI, SPIM0_MI),
PAD_FUNC_GPIO(SPIM0_CSB),
- PAD_FUNC(SPIM0_MO, SPIM0_MO),
- PAD_FUNC(SPIM0_CLK, SPIM0_CLK),
+ PAD_FUNC_DOWN(SPIM0_MO, SPIM0_MO),
+ PAD_FUNC_DOWN(SPIM0_CLK, SPIM0_CLK),
},
{
- PAD_FUNC(SPIM1_MI, SPIM1_MI),
+ PAD_FUNC_DOWN(SPIM1_MI, SPIM1_MI),
PAD_FUNC_GPIO(SPIM1_CSB),
- PAD_FUNC(SPIM1_MO, SPIM1_MO),
- PAD_FUNC(SPIM1_CLK, SPIM1_CLK),
+ PAD_FUNC_DOWN(SPIM1_MO, SPIM1_MO),
+ PAD_FUNC_DOWN(SPIM1_CLK, SPIM1_CLK),
},
{
- PAD_FUNC(SPIM2_MI, SPIM2_MI),
+ PAD_FUNC_DOWN(SPIM2_MI, SPIM2_MI),
PAD_FUNC_GPIO(SPIM2_CSB),
- PAD_FUNC(SPIM2_MO, SPIM2_MO),
- PAD_FUNC(SPIM2_CLK, SPIM2_CLK),
+ PAD_FUNC_DOWN(SPIM2_MO, SPIM2_MO),
+ PAD_FUNC_DOWN(SPIM2_CLK, SPIM2_CLK),
},
{
- PAD_FUNC(PWRAP_SPI_MI, SPIM3_MI),
+ PAD_FUNC_DOWN(PWRAP_SPI_MI, SPIM3_MI),
PAD_FUNC_GPIO(PWRAP_SPI_CSN),
- PAD_FUNC(PWRAP_SPI_MO, SPIM3_MO),
- PAD_FUNC(PWRAP_SPI_CK, SPIM3_CLK),
+ PAD_FUNC_DOWN(PWRAP_SPI_MO, SPIM3_MO),
+ PAD_FUNC_DOWN(PWRAP_SPI_CK, SPIM3_CLK),
},
{
- PAD_FUNC(DGI_D3, SPIM4_MI),
+ PAD_FUNC_DOWN(DGI_D3, SPIM4_MI),
PAD_FUNC_GPIO(DGI_D2),
- PAD_FUNC(DGI_D1, SPIM4_MO),
- PAD_FUNC(DGI_D0, SPIM4_CLK),
+ PAD_FUNC_DOWN(DGI_D1, SPIM4_MO),
+ PAD_FUNC_DOWN(DGI_D0, SPIM4_CLK),
},
{
- PAD_FUNC(DGI_D7, SPIM5_MI),
+ PAD_FUNC_DOWN(DGI_D7, SPIM5_MI),
PAD_FUNC_GPIO(DGI_D6),
- PAD_FUNC(DGI_D5, SPIM5_MO),
- PAD_FUNC(DGI_D4, SPIM5_CLK),
+ PAD_FUNC_DOWN(DGI_D5, SPIM5_MO),
+ PAD_FUNC_DOWN(DGI_D4, SPIM5_CLK),
},
};
@@ -89,7 +81,7 @@ void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
ptr = pad0_funcs[bus];
for (int i = 0; i < 4; i++)
- gpio_set_mode((gpio_t){.id = ptr[i].pin_id}, ptr[i].func);
+ gpio_set_mode(ptr[i].gpio, ptr[i].func);
}
static const struct spi_ctrlr spi_flash_ctrlr = {