diff options
author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-04-19 20:50:44 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-13 01:43:30 +0000 |
commit | 8c3b747ccffc6a0fda8bde74caaf685dde78930f (patch) | |
tree | 32afb4dda627758fe63bd1c9acbb0b21ea0d755a /src/soc/mediatek/mt8195/scp.c | |
parent | 2d0bf34201b68e10597c16d5684c14dd4c9587ea (diff) |
soc/mediatek/mt8195: Enable SCP SRAM
Enable SCP SRAM to allow module in SCPSYS to access DRAM.
TEST=AFE acess DRAM successfully
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I40862f8d74e5aa17361f1c91ea31a10b0a4ffb31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54014
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/scp.c')
-rw-r--r-- | src/soc/mediatek/mt8195/scp.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/scp.c b/src/soc/mediatek/mt8195/scp.c new file mode 100644 index 0000000000..3a3bc27b1c --- /dev/null +++ b/src/soc/mediatek/mt8195/scp.c @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <soc/scp.h> + +void scp_rsi_enable(void) +{ + u32 val; + + for (val = SCP_SRAM_PDN_DISABLE_VAL; val != 0U;) { + val = val >> 1; + write32(REG_L1TCM_SRAM_PDN, val); + } +} + +void scp_rsi_disable(void) +{ + write32(REG_L1TCM_SRAM_PDN, SCP_SRAM_PDN_DISABLE_VAL); +} |