diff options
| author | Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com> | 2021-09-15 13:01:55 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-02 11:48:34 +0000 |
| commit | f4b71734b266b5cf276e7bd3b0de45553a0728bd (patch) | |
| tree | 85e45203fb6a32dc86f527c74ef9c9f4ae9d369e /src/soc/mediatek/mt8195/include | |
| parent | 38abbdab71e6bf275c9c49748f1830576ddb2f22 (diff) | |
soc/mediatek: Fix I2C failures by adjusting AC timing and bus speed
1. The original algorithm for I2C speed cannot always make the
timing meet I2C specification so a new algorithm is introduced
to calculate the timing parameters more correctly.
2. Some I2C buses should be initialized in a different speed while
the original implementation was fixed at fast mode (400Khz).
So the mtk_i2c_bus_init is now also taking an extra speed
parameter.
There is an equivalent change in kernel side:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/i2c/busses/i2c-mt65xx.c?h=v5.15-rc3&id=be5ce0e97cc7a5c0d2da45d617b7bc567c3d3fa1
BUG=b:189899864
TEST=Test on Tomato, boot pass and timing pass
at 100/300/400/500/800/1000Khz.
Signed-off-by: Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com>
Change-Id: Id25b7bb3a76908a7943b940eb5bee799e80626a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58053
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/i2c.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/i2c.h b/src/soc/mediatek/mt8195/include/soc/i2c.h index 977106e482..743faa1e53 100644 --- a/src/soc/mediatek/mt8195/include/soc/i2c.h +++ b/src/soc/mediatek/mt8195/include/soc/i2c.h @@ -22,7 +22,8 @@ struct mt_i2c_regs { uint32_t hs; uint32_t io_config; uint32_t fifo_addr_clr; - uint32_t reserved0[2]; + uint32_t data_timing; + uint32_t reserved0; uint32_t transfer_aux_len; uint32_t clock_div; uint32_t time_out; @@ -51,8 +52,9 @@ enum { I2C7, }; +#define MAX_CLOCK_DIV 32 check_member(mt_i2c_regs, multi_dma, 0xf8c); -void mtk_i2c_bus_init(uint8_t bus); +void mtk_i2c_bus_init(uint8_t bus, uint32_t speed); #endif /* SOC_MEDIATEK_MT8195_I2C_H */ |