diff options
| author | Zhenguo Li <ot_zhenguo.li@mediatek.corp-partner.google.com> | 2021-09-07 19:45:37 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-13 13:57:45 +0000 |
| commit | dacff81a66676e8816740b98266aa2257137fd81 (patch) | |
| tree | b5ded74c8f31437959adcc3900ee95c7186c806c /src/soc/mediatek/mt8195/include | |
| parent | a31d6cd5d02a21452d92859a682ebbc674080c49 (diff) | |
soc/mediatek/mt8195: add tracker dump
Tracker is a debugging tool, include AP/INFRA/PERI tracker.
When bus timeout occurs, the system reboots and latches some
values which could be used for debug.
Signed-off-by: Zhenguo Li <ot_zhenguo.li@mediatek.corp-partner.google.com>
Change-Id: If457f4a096cd63038bf6b40552aa3caaba33d5fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58243
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/addressmap.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/addressmap.h b/src/soc/mediatek/mt8195/include/soc/addressmap.h index 3ddaa54d74..88b545a97e 100644 --- a/src/soc/mediatek/mt8195/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8195/include/soc/addressmap.h @@ -4,10 +4,11 @@ #define __SOC_MEDIATEK_MT8195_INCLUDE_SOC_ADDRESSMAP_H__ enum { - MCUSYS_BASE = 0x0C530000, - MCUPM_SRAM_BASE = 0x0C540000, - MCUPM_CFG_BASE = 0x0C560000, - IO_PHYS = 0x10000000, + MCUSYS_BASE = 0x0C530000, + MCUPM_SRAM_BASE = 0x0C540000, + MCUPM_CFG_BASE = 0x0C560000, + BUS_TRACE_MONITOR_BASE = 0x0D040000, + IO_PHYS = 0x10000000, }; enum { @@ -35,12 +36,15 @@ enum { DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000, DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000, DEVAPC_FMEM_AO_BASE = IO_PHYS + 0x00044000, + DBG_TRACKER_BASE = IO_PHYS + 0x00208000, + PERI_TRACKER_BASE = IO_PHYS + 0x00218000, EMI0_BASE = IO_PHYS + 0x00219000, EMI1_BASE = IO_PHYS + 0x0021D000, I2C_DMA_BASE = IO_PHYS + 0x00220080, EMI1_SUB_BASE = IO_PHYS + 0x00225000, EMI0_MPU_BASE = IO_PHYS + 0x00226000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, + INFRA_TRACKER_BASE = IO_PHYS + 0x00314000, SSPM_SRAM_BASE = IO_PHYS + 0x00400000, SSPM_CFG_BASE = IO_PHYS + 0x00440000, SCP_CFG_BASE = IO_PHYS + 0x00700000, |