diff options
| author | Jianjun Wang <jianjun.wang@mediatek.com> | 2022-03-23 15:28:10 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-03-29 15:41:37 +0000 |
| commit | acf16bf4f69e417c75021e49bd455a212adbcd46 (patch) | |
| tree | 7145a5841ad86893c43c40f66b885ed9bbafd927 /src/soc/mediatek/mt8195/include | |
| parent | 41faa22c532def4093a65366764d12298c6a10d3 (diff) | |
soc/mediatek/mt8195: Add early init support
Add early init support for MT8195 platform.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15b7
PCI SSVID : 0x15b7
SN : 21517J440114
MN : WDC PC SN530 SDBPTPZ-256G-1006
RAB : 0x4
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
BRANCH=cherry
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I4eb7da53ff76c385cab18bbf84970e96b61662ac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/memlayout.ld | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/memlayout.ld b/src/soc/mediatek/mt8195/include/soc/memlayout.ld index 5942776e81..e8b51d2404 100644 --- a/src/soc/mediatek/mt8195/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8195/include/soc/memlayout.ld @@ -19,6 +19,9 @@ _ = ASSERT(size % 4K == 0, \ "DRAM DMA buffer should be multiple of smallest page size (4K)!"); +#define EARLY_INIT(addr, size) \ + REGION(early_init_data, addr, size, 4) + SECTIONS { SRAM_START(0x00100000) @@ -26,6 +29,7 @@ SECTIONS TPM_TCPA_LOG(0x00103000, 2K) FMAP_CACHE(0x00103800, 2K) WATCHDOG_TOMBSTONE(0x00104000, 4) + EARLY_INIT(0x00104010, 128) CBFS_MCACHE(0x00107c00, 8K) TIMESTAMP(0x00109c00, 1K) STACK(0x0010a000, 12K) |