soc/mediatek/mt8195: Add mtcmos init support

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Change-Id: If7cd1f596f1406fa21d6586510e9956bb9846a6f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52882
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

1 files changed, 50 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8195/include/soc/spm.h b/src/soc/mediatek/mt8195/include/soc/spm.h
index c90e632477..319509a5c2 100644
--- a/src/soc/mediatek/mt8195/include/soc/spm.h
+++ b/src/soc/mediatek/mt8195/include/soc/spm.h
@@ -4,8 +4,13 @@
 #define SOC_MEDIATEK_MT8195_SPM_H
 
 #include <soc/addressmap.h>
+#include <soc/mtcmos.h>
 #include <types.h>
 
+/* SPM READ/WRITE CFG */
+#define SPM_PROJECT_CODE	0xb16
+#define SPM_REGWR_CFG_KEY	(SPM_PROJECT_CODE << 16)
+
 struct mtk_spm_regs {
 	u32 poweron_config_set;
 	u32 spm_power_on_val0;
@@ -528,9 +533,54 @@ struct mtk_spm_regs {
 	u32 spm_pmsr_len_con2;
 };
 
+check_member(mtk_spm_regs, pwr_status, 0x016c);
+check_member(mtk_spm_regs, audio_pwr_con, 0x0358);
 check_member(mtk_spm_regs, ap_mdsrc_req, 0x043c);
 check_member(mtk_spm_regs, ulposc_con, 0x644);
 
 static struct mtk_spm_regs *const mtk_spm = (void *)SPM_BASE;
 
+static const struct power_domain_data disp[] = {
+	{
+		.pwr_con = &mtk_spm->vppsys0_pwr_con,
+		.pwr_sta_mask = 0x1 << 11,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+	},
+	{
+		.pwr_con = &mtk_spm->vdosys0_pwr_con,
+		.pwr_sta_mask = 0x1 << 13,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+	},
+	{
+		.pwr_con = &mtk_spm->vppsys1_pwr_con,
+		.pwr_sta_mask = 0x1 << 12,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+	},
+	{
+		.pwr_con = &mtk_spm->vdosys1_pwr_con,
+		.pwr_sta_mask = 0x1 << 14,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+	},
+};
+
+static const struct power_domain_data audio[] = {
+	{
+		.pwr_con = &mtk_spm->adsp_pwr_con,
+		.pwr_sta_mask = 0x1 << 10,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+		.caps = SCPD_SRAM_ISO,
+	},
+	{
+		.pwr_con = &mtk_spm->audio_pwr_con,
+		.pwr_sta_mask = 0x1 << 8,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+	},
+};
+
 #endif  /* SOC_MEDIATEK_MT8195_SPM_H */