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authorZhiqiang Ma <zhiqiang.ma@mediatek.com>2021-06-02 16:31:33 +0800
committerHung-Te Lin <hungte@chromium.org>2021-06-05 13:04:54 +0000
commitd2644dbf5fc1259c7bfcdbe3be9831e97d10d62e (patch)
treef23bcd4da84de1921385b5a7042170aaaeec7514 /src/soc/mediatek/mt8195/include
parent9e3e0f560b3c6c3714473685d3b3866baf4f400d (diff)
soc/mediatek/mt8195: Enable mt8195 auxadc
Enable auxadc on MediaTek mt8195 platform. Signed-off-by: Zhiqiang Ma <zhiqiang.ma@mediatek.com> Change-Id: Ie79420e20c9ed6155791b490e1b5e4b44a579a49 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55155 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/include')
-rw-r--r--src/soc/mediatek/mt8195/include/soc/addressmap.h2
-rw-r--r--src/soc/mediatek/mt8195/include/soc/auxadc.h23
-rw-r--r--src/soc/mediatek/mt8195/include/soc/efuse.h16
3 files changed, 40 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8195/include/soc/addressmap.h b/src/soc/mediatek/mt8195/include/soc/addressmap.h
index e5195cacb4..f94410d4a9 100644
--- a/src/soc/mediatek/mt8195/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8195/include/soc/addressmap.h
@@ -50,8 +50,8 @@ enum {
DPM_PM_SRAM_BASE2 = IO_PHYS + 0x00A00000,
DPM_DM_SRAM_BASE2 = IO_PHYS + 0x00A20000,
DPM_CFG_BASE2 = IO_PHYS + 0x00A40000,
- AUXADC_BASE = IO_PHYS + 0x01001000,
UART0_BASE = IO_PHYS + 0x01001100,
+ AUXADC_BASE = IO_PHYS + 0x01002000,
PERICFG_AO_BASE = IO_PHYS + 0x01003000,
SPI0_BASE = IO_PHYS + 0x0100A000,
SPI1_BASE = IO_PHYS + 0x01010000,
diff --git a/src/soc/mediatek/mt8195/include/soc/auxadc.h b/src/soc/mediatek/mt8195/include/soc/auxadc.h
new file mode 100644
index 0000000000..63c8c7cd1c
--- /dev/null
+++ b/src/soc/mediatek/mt8195/include/soc/auxadc.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8195_AUXADC_H
+#define SOC_MEDIATEK_MT8195_AUXADC_H
+
+#include <soc/auxadc_common.h>
+#include <soc/infracfg.h>
+#include <stdint.h>
+
+typedef struct mtk_auxadc_regs {
+ uint32_t con0;
+ uint32_t con1;
+ uint32_t con1_set;
+ uint32_t con1_clr;
+ uint32_t con2;
+ uint32_t data[16];
+ uint32_t reserved[16];
+ uint32_t misc;
+} mtk_auxadc_regs;
+
+static struct mt8195_infracfg_ao_regs *const mtk_infracfg = mt8195_infracfg_ao;
+
+#endif
diff --git a/src/soc/mediatek/mt8195/include/soc/efuse.h b/src/soc/mediatek/mt8195/include/soc/efuse.h
new file mode 100644
index 0000000000..360a411576
--- /dev/null
+++ b/src/soc/mediatek/mt8195/include/soc/efuse.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef SOC_MEDIATEK_MT8195_EFUSE_H
+#define SOC_MEDIATEK_MT8195_EFUSE_H
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+struct efuse_regs {
+ uint32_t reserved[130];
+ uint32_t adc_cali_reg;
+};
+
+check_member(efuse_regs, adc_cali_reg, 0x208);
+static struct efuse_regs *const mtk_efuse = (void *)EFUSEC_BASE;
+
+#endif