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authorYidi Lin <yidilin@chromium.org>2024-05-29 17:21:30 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-08-10 01:10:20 +0000
commitdb5dbdf310bca698acaa4ce945692ef59147aca4 (patch)
tree5d1194ff007e0de747109e3329d457bedc41233b /src/soc/mediatek/mt8195/Makefile.mk
parentb60cfb89e99bd2c6a7136b99385eb1fbe5b8e85d (diff)
soc/mediatek/common: Refactor EINT driver
Refactor EINT driver by - Move `pos_bit_calc_for_eint` to `common/gpio_eint_v1.c` and rename to `gpio_calc_eint_pos_bit`. - Implement `gpio_get_eint_reg` to obtain EINT base address. This change is prepared for the driver change in MT8196. BUG=b:334723688 TEST=EINT works on Geralt Change-Id: Ie53abc23971bfa39250ebd7dd48e28d6b91c5973 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83703 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195/Makefile.mk')
-rw-r--r--src/soc/mediatek/mt8195/Makefile.mk2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk
index 56a10bc2f2..d1c1920482 100644
--- a/src/soc/mediatek/mt8195/Makefile.mk
+++ b/src/soc/mediatek/mt8195/Makefile.mk
@@ -3,7 +3,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y)
# for bootblock, verstage, romstage, ramstage
all-y += ../common/flash_controller.c
-all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
+all-y += ../common/gpio_eint_v1.c ../common/gpio.c ../common/gpio_op.c gpio.c
all-y += ../common/i2c.c i2c.c
all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
all-y += ../common/timer.c ../common/timer_prepare.c