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| author | Yidi Lin <yidi.lin@mediatek.com> | 2021-04-22 13:34:04 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-04-26 02:42:33 +0000 |
| commit | 6968782ac0309bd0178eb4a421355e1bb7bf3a92 (patch) | |
| tree | f50a54a2fe0c3a800044a6148b82816d7ad4f669 /src/soc/mediatek/mt8195/Kconfig | |
| parent | fdad5ad74baea3f29495126c31159a9bcb352d79 (diff) | |
soc/mediatek/mt8195: Initialize watchdog
MT8195 requires writing speical value to mode register to clear
status register. This value is invalid on other platforms. We can
do this safely in the common watchdog driver.
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Iba5b41f426fc38719bb343a220e0724bff229c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/Kconfig')
| -rw-r--r-- | src/soc/mediatek/mt8195/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/Kconfig b/src/soc/mediatek/mt8195/Kconfig index 090ca2fe17..76329cd2e1 100644 --- a/src/soc/mediatek/mt8195/Kconfig +++ b/src/soc/mediatek/mt8195/Kconfig @@ -6,6 +6,8 @@ config SOC_MEDIATEK_MT8195 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_RAMSTAGE_ARMV8_64 select HAVE_UART_SPECIAL + select SOC_MEDIATEK_COMMON + select CLEAR_WDT_MODE_REG if SOC_MEDIATEK_MT8195 |