diff options
| author | Marc Jones <marcjones@sysproconsulting.com> | 2021-03-12 14:36:48 -0700 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2021-03-20 16:48:33 +0000 |
| commit | 4de7610b32afc888e8c70c4a35525eab6e977cbe (patch) | |
| tree | b66c548d331bc1454d1dde1745beaeb16fdd83a5 /src/soc/mediatek/mt8192 | |
| parent | 52e14f78ba43ebd66e9de26eef1c03011ff7c778 (diff) | |
soc/intel/xeon_sp/cpx: Set PCU locks
Set the PCU locks as indicated by the BWG.
Lock the following:
P_STATE_LIMITS
PACKAGE_RAPL_LIMIT
SAPMCTL
DRAM_PLANE_POWER_LIMIT
CONFIG_TDP_CONTROL
Change-Id: I5f44d83e2dd8411358a83b5641ddb4c370eb4e84
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51505
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192')
0 files changed, 0 insertions, 0 deletions