soc/mediatek/mt8192: Add DRAM resource in ramstage

Add DRAM resource in ramstage to load payload.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: Iac02f81fc7d47851b3bba442eb7043169fbdbcfb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

2 files changed, 31 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc
index 25574c9ac8..b0faf6290c 100644
--- a/src/soc/mediatek/mt8192/Makefile.inc
+++ b/src/soc/mediatek/mt8192/Makefile.inc
@@ -18,7 +18,9 @@ romstage-y += ../common/timer.c
 romstage-y += ../common/uart.c
 
 ramstage-y += ../common/gpio.c gpio.c
+ramstage-y += emi.c
 ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
+ramstage-y += soc.c
 ramstage-y += ../common/timer.c
 ramstage-y += ../common/uart.c
 
diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c
new file mode 100644
index 0000000000..9850fa6fbe
--- /dev/null
+++ b/src/soc/mediatek/mt8192/soc.c
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/device.h>
+#include <soc/emi.h>
+#include <symbols.h>
+
+static void soc_read_resources(struct device *dev)
+{
+	ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
+}
+
+static void soc_init(struct device *dev)
+{
+}
+
+static struct device_operations soc_ops = {
+	.read_resources = soc_read_resources,
+	.init = soc_init,
+};
+
+static void enable_soc_dev(struct device *dev)
+{
+	dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_mediatek_mt8192_ops = {
+	CHIP_NAME("SOC Mediatek MT8192")
+	.enable_dev = enable_soc_dev,
+};