diff options
author | Wenbin Mei <wenbin.mei@mediatek.com> | 2020-09-25 10:03:02 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-16 06:27:12 +0000 |
commit | 1985894e74711934018f97d082f0b9a9db230894 (patch) | |
tree | 72b9e7701ec7a040a8b42e27d9ee14a8dfcdd083 /src/soc/mediatek/mt8192/soc.c | |
parent | 92d59931c42df35358dbeaa090d511d340cb1431 (diff) |
soc/mediatek/mt8192: ufs: Disable reference clock
UFS reference clock (refclk) is enabled by default, which will cause
the UFSHCI to hold the SPM signal and lead to suspend failure. Since
UFS kernel driver is not built-in, disable refclk in coreboot stage.
Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Change-Id: If11c1b756ad1a0b85f1005f56a6cb4648c687cf0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8192/soc.c')
-rw-r--r-- | src/soc/mediatek/mt8192/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index bf9e8e794e..8696f342d4 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -5,6 +5,7 @@ #include <soc/mcupm.h> #include <soc/mmu_operations.h> #include <soc/sspm.h> +#include <soc/ufs.h> #include <symbols.h> static void soc_read_resources(struct device *dev) @@ -17,6 +18,7 @@ static void soc_init(struct device *dev) mtk_mmu_disable_l2c_sram(); mcupm_init(); sspm_init(); + ufs_disable_refclk(); } static struct device_operations soc_ops = { |