diff options
| author | TingHan.Shen <tinghan.shen@mediatek.com> | 2020-11-20 14:42:23 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-10 14:05:27 +0000 |
| commit | be404c22aa8d9675d1b4b62fd188aee5aef01f88 (patch) | |
| tree | 106901eae8c15dfc66892ce28580e18866ecd5f9 /src/soc/mediatek/mt8192/soc.c | |
| parent | 916e2efad4daaf6572107ed2e9b669e434eb5629 (diff) | |
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in
secure domain. The initialization flow is to load SSPM firmware to
its SRAM space and then enable.
Signed-off-by: TingHan.Shen <tinghan.shen@mediatek.com>
Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47786
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192/soc.c')
| -rw-r--r-- | src/soc/mediatek/mt8192/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 00a57d2f37..bf9e8e794e 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -4,6 +4,7 @@ #include <soc/emi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> +#include <soc/sspm.h> #include <symbols.h> static void soc_read_resources(struct device *dev) @@ -15,6 +16,7 @@ static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); mcupm_init(); + sspm_init(); } static struct device_operations soc_ops = { |