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author | Felix Held <felix-coreboot@felixheld.de> | 2023-05-05 20:46:11 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-06-07 00:16:58 +0000 |
commit | e4b65cc945bb5256fdb65041b9f4d20c05155cd8 (patch) | |
tree | 083b3aa4a2afbd78f521ae749c6c6b69661159ec /src/soc/mediatek/mt8192/mt6359p.c | |
parent | 784c9c693fd2398e4283bdcd8051a027268238e0 (diff) |
soc/amd/common/data_fabric/domain: write _BBN method in SSDT
Instead of having PCI0's _BBN method in the DSDT that always returns 0,
use acpigen_write_BBN to generate the _BBN method that returns the first
PCI bus number in the PCI domain/host bridge.
TEST=On mandolin the _BBN method in the _SB/PCI0 scope is now in the
SSDT instead of the DSDT, but still returns 0.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8badeb0064b498d3f18217ea24bff73676913b02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74992
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192/mt6359p.c')
0 files changed, 0 insertions, 0 deletions