diff options
| author | Chien-Chih Tseng <chien-chih.tseng@mediatek.com> | 2020-12-14 14:59:39 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-11 08:51:09 +0000 |
| commit | a39ea90506ea200f3dbf2c14bea82c327a37edbc (patch) | |
| tree | 324c502e5a39a6a4984354442f874747f8cdf695 /src/soc/mediatek/mt8192/Makefile.inc | |
| parent | 0250a7888d91f816310fd5bd36c86d05167a7403 (diff) | |
soc/mediatek/mt8192: add apusys init flow
Setup APU mbox's functional configuration registers.
BUG=b:186369803
BRANCH=asurada
TEST=boot asurada correctly
Signed-off-by: Chien-Chih Tseng <chien-chih.tseng@mediatek.com>
Change-Id: If05a8af1a2f96598adcf70e15003e4f5dc94e337
Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48622
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8192/Makefile.inc')
| -rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 24394173d9..f69274e3fe 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -42,6 +42,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c romstage-y += ../common/mt6315.c mt6315.c romstage-y += ../common/mt6359p.c mt6359p.c +ramstage-y += apusys.c ramstage-y += ../common/auxadc.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += devapc.c |