diff options
| author | Huayang Duan <huayang.duan@mediatek.com> | 2020-06-24 10:14:32 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-03-08 03:15:43 +0000 |
| commit | 4c7bf7eaaf5c185272b947fd6a1c8da7dbe01edf (patch) | |
| tree | 1821ec454307eebc1d37dfe4c07bb0baecb8b91a /src/soc/mediatek/mt8192/Makefile.inc | |
| parent | e8c681cc6249cc7717885a12373e4fcf34034b1c (diff) | |
soc/mediatek/mt8192: initialize DRAM using vendor reference code
Mediatek has released the reference implementation for DRAM
initialization in vendorcode/mediatek/mt8192/dramc (CB:50294)
so we want to use it to replace the derived calibration code
in soc folder.
Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I2b2f41d774c6b85f106867144fb0b29a4a1bdfcf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8192/Makefile.inc')
| -rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index a872916763..2370c654c5 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -29,14 +29,12 @@ verstage-y += ../common/uart.c romstage-y += ../common/auxadc.c romstage-y += ../common/cbmem.c romstage-y += ../common/dram_init.c -romstage-y += dramc_pi_main.c dramc_pi_basic_api.c dramc_pi_calibration_api.c -romstage-y += dramc_utility.c dramc_dvfs.c -romstage-y += emi.c +romstage-y += ../common/dramc_param.c romstage-y += ../common/flash_controller.c romstage-y += ../common/gpio.c gpio.c romstage-y += ../common/i2c.c i2c.c +romstage-y += ../common/memory.c ../common/memory_test.c romstage-y += ../common/mmu_operations.c mmu_operations.c -romstage-y += ../common/memory.c ../common/dramc_param.c ../common/memory_test.c romstage-y += ../common/pll.c pll.c romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c romstage-y += ../common/timer.c @@ -53,7 +51,6 @@ ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c ramstage-y += ../common/flash_controller.c ramstage-y += ../common/gpio.c gpio.c ramstage-y += ../common/i2c.c i2c.c -ramstage-y += emi.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-y += ../common/mcu.c ramstage-y += mcupm.c @@ -97,6 +94,7 @@ BL31_MAKEARGS += PLAT=mt8192 CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include +CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8192/include $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ |