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authorRuihai Zhou <zhouruihai@huaqin.corp-partner.google.com>2023-05-29 20:27:06 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-06-06 12:16:26 +0000
commit4a6041814ee0e2e19bc97da550689f7a2d9b7873 (patch)
tree302cf55c4eb51cd8e60490a2857c59eb01b0657b /src/soc/mediatek/mt8188
parentfbe044235b07711540b06dda434d32add8cff8bc (diff)
mb/google/geralt: Fix MIPI panel power on/off sequence
Based on the power sequence of the panel [1], the power on T2 sequence VSP to VSN should be larger than 1ms, and the power off T2 sequence VSP to VSN should be larger than 0ms. We modify the power sequence to meet the datasheet requirement. [1] B5 TV110C9M-LL0 Product Specification Rev.P0 Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> Change-Id: I4ccb5be04062a0516f84a054ff3f40afbf5279be Reviewed-on: https://review.coreboot.org/c/coreboot/+/75512 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8188')
-rw-r--r--src/soc/mediatek/mt8188/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc
index 651cff0d5a..67c2d7ac23 100644
--- a/src/soc/mediatek/mt8188/Makefile.inc
+++ b/src/soc/mediatek/mt8188/Makefile.inc
@@ -55,6 +55,7 @@ ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
ramstage-y += soc.c
ramstage-y += ../common/spm.c spm.c
ramstage-y += ../common/sspm.c
+ramstage-y += ../common/tps65132s.c
ramstage-y += ../common/usb.c usb.c
BL31_MAKEARGS += PLAT=mt8188