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authorShaocheng Wang <shaocheng.wang@mediatek.corp-partner.google.com>2022-07-05 15:41:18 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-07-13 10:42:14 +0000
commit15e5a3be76826cefb8e9708bb08b12070042a9f2 (patch)
tree328fd25f3cc88d42fd67061f4a6a0df5c37eee97 /src/soc/mediatek/mt8188
parent29f1866e9592bd3bc2d9ec25039a732bfa30b5fa (diff)
soc/mediatek/mt8188: add usb host support
Add usb host function support. TEST=read usb data successfully. BUG=b:236331724 Signed-off-by: Shaocheng Wang <shaocheng.wang@mediatek.corp-partner.google.com> Change-Id: I3494b687b811466cb6b988164d3c5b6fecc3016a Reviewed-on: https://review.coreboot.org/c/coreboot/+/65754 Reviewed-by: Yidi Lin <yidilin@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8188')
-rw-r--r--src/soc/mediatek/mt8188/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8188/include/soc/addressmap.h2
-rw-r--r--src/soc/mediatek/mt8188/include/soc/usb.h29
-rw-r--r--src/soc/mediatek/mt8188/usb.c21
4 files changed, 52 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc
index a7458b4c4e..b754c31ecb 100644
--- a/src/soc/mediatek/mt8188/Makefile.inc
+++ b/src/soc/mediatek/mt8188/Makefile.inc
@@ -19,6 +19,7 @@ romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
ramstage-y += emi.c
ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
ramstage-y += soc.c
+ramstage-y += ../common/usb.c usb.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include
diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h
index 7e3f9c00cf..d54a9c690b 100644
--- a/src/soc/mediatek/mt8188/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h
@@ -69,7 +69,7 @@ enum {
I2C4_BASE = IO_PHYS + 0x01E01000,
IOCFG_LT_BASE = IO_PHYS + 0x01E10000,
IOCFG_LM_BASE = IO_PHYS + 0x01E20000,
- SSUSB_SIF_BASE = IO_PHYS + 0x01E40000,
+ SSUSB_SIF_BASE = IO_PHYS + 0x01E40300,
IOCFG_RT_BASE = IO_PHYS + 0x01EA0000,
MSDC1_TOP_BASE = IO_PHYS + 0x01EB0000,
I2C5_BASE = IO_PHYS + 0x01EC0000,
diff --git a/src/soc/mediatek/mt8188/include/soc/usb.h b/src/soc/mediatek/mt8188/include/soc/usb.h
new file mode 100644
index 0000000000..d343721390
--- /dev/null
+++ b/src/soc/mediatek/mt8188/include/soc/usb.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8188 Functional Specification
+ * Chapter number: 5.5
+ */
+
+#ifndef SOC_MEDIATEK_MT8188_USB_H
+#define SOC_MEDIATEK_MT8188_USB_H
+
+#include <soc/usb_common.h>
+
+struct ssusb_sif_port {
+ struct sif_u2_phy_com u2phy;
+ u32 reserved0[64 * 5];
+ struct sif_u3phyd u3phyd;
+ u32 reserved1[64];
+ struct sif_u3phya u3phya;
+ struct sif_u3phya_da u3phya_da;
+ u32 reserved2[64 * 3];
+};
+check_member(ssusb_sif_port, u3phyd, 0x600);
+check_member(ssusb_sif_port, u3phya, 0x800);
+check_member(ssusb_sif_port, u3phya_da, 0x900);
+check_member(ssusb_sif_port, reserved2, 0xa00);
+
+#define USB_PORT_NUMBER 1
+
+#endif
diff --git a/src/soc/mediatek/mt8188/usb.c b/src/soc/mediatek/mt8188/usb.c
new file mode 100644
index 0000000000..8d1f513758
--- /dev/null
+++ b/src/soc/mediatek/mt8188/usb.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8188 Functional Specification
+ * Chapter number: 5.5
+ */
+
+#include <device/mmio.h>
+#include <gpio.h>
+#include <soc/gpio.h>
+#include <soc/infracfg.h>
+#include <soc/pll_common.h>
+#include <soc/usb.h>
+
+void mtk_usb_prepare(void)
+{
+ mt_pll_set_usb_clock();
+
+ /* usb drvvbus for 5v power */
+ gpio_output(GPIO(USB1_DRV_VBUS), 1);
+}