diff options
| author | Liju-Clr Chen <liju-clr.chen@mediatek.com> | 2022-11-02 15:01:13 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-04 01:00:52 +0000 |
| commit | d222d1add8ba262afeb42918d3af8b8628711015 (patch) | |
| tree | f1c989092d2bf161e9ddede92cdbf0b62c5009c2 /src/soc/mediatek/mt8188 | |
| parent | bcb610a5595f7ff99129dfbaff9c6b4e1b5c3584 (diff) | |
Revert "soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers"
This reverts commit a8172c329fe309f3b5b409c1a59a227186400dd4.
In the aforementioned patch, we allowed MCUPM to access secure
registers and set the domain to DOMAIN_2.
Additional attribute settings are also required when a hardware is
set to a specific domain. Otherwise, there would be violation between
hardware. Since MT8188 is in bring-up stage, we simply enable access
register permission for the DOMAIN_0 by default. So remove the wrong
setting for MCUPM, SCP and SSPM.
We will complete DEVAPC setting when the settings are confirmed.
Change-Id: I5d9809f6e84b8d10bc2e6f2ea5a442e676ad3bf9
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69139
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8188')
| -rw-r--r-- | src/soc/mediatek/mt8188/devapc.c | 6 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/include/soc/devapc.h | 4 |
2 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/mediatek/mt8188/devapc.c b/src/soc/mediatek/mt8188/devapc.c index 260b9ffd9b..1fe3cf8626 100644 --- a/src/soc/mediatek/mt8188/devapc.c +++ b/src/soc/mediatek/mt8188/devapc.c @@ -1550,12 +1550,6 @@ static void dump_peri_par_ao_apc(uintptr_t base) static void infra_init(uintptr_t base) { - /* Side band */ - SET32_BITFIELDS(getreg(base, MAS_SEC_0), MCUPM_SEC, SECURE_TRANS); - - /* Master domain */ - SET32_BITFIELDS(getreg(base, MAS_DOM_0), SCP_SSPM_DOM, DOMAIN_2, MCUPM_DOM, DOMAIN_2); - /* Default APC setting */ set_infra_ao_apc(base); } diff --git a/src/soc/mediatek/mt8188/include/soc/devapc.h b/src/soc/mediatek/mt8188/include/soc/devapc.h index d742c220ae..e0b0f00ccf 100644 --- a/src/soc/mediatek/mt8188/include/soc/devapc.h +++ b/src/soc/mediatek/mt8188/include/soc/devapc.h @@ -17,10 +17,6 @@ enum devapc_ao_offset { AO_APC_CON = 0x00F00, }; -DEFINE_BIT(MCUPM_SEC, 1) -DEFINE_BITFIELD(MCUPM_DOM, 11, 8) -DEFINE_BITFIELD(SCP_SSPM_DOM, 19, 16) - /****************************************************************************** * STRUCTURE DEFINITION ******************************************************************************/ |