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authorot_zhenguo.li <ot_zhenguo.li@mediatek.corp-partner.google.com>2023-02-24 13:55:27 +0800
committerRex-BC Chen <rex-bc.chen@mediatek.com>2023-03-10 12:38:31 +0000
commit6bd9d959ddc3fabd84c57de41c6a1db7c400f562 (patch)
tree711884a36cf424ad1d35cc4874211596a8866e26 /src/soc/mediatek/mt8188
parentc9bf43f4d6caa4b59a6eaff8fff2929c609c6122 (diff)
soc/mediatek/mt8188: Enable lastbus debug hardware
Lastbus is a bus debug tool. When the bus hangs, the bus transmission information before resetting will be recorded. The watchdog cannot clear it and it will be printed out for bus hanging analysis. There are two versions for lastbus: Version 1 for MT8186, and version 2 for MT8188. BUG=b:263753374 TEST=build pass. Change-Id: Ibaf510481d1941376bd8da0168ef17c99a0fb9a2 Signed-off-by: ot_zhenguo.li <ot_zhenguo.li@mediatek.corp-partner.google.com> Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73624 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8188')
-rw-r--r--src/soc/mediatek/mt8188/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8188/bootblock.c2
-rw-r--r--src/soc/mediatek/mt8188/include/soc/addressmap.h6
-rw-r--r--src/soc/mediatek/mt8188/lastbus.c79
4 files changed, 88 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc
index 95df6dc1d9..651cff0d5a 100644
--- a/src/soc/mediatek/mt8188/Makefile.inc
+++ b/src/soc/mediatek/mt8188/Makefile.inc
@@ -11,6 +11,7 @@ all-y += ../common/uart.c
bootblock-y += bootblock.c
bootblock-y += ../common/eint_event.c
+bootblock-y += ../common/lastbus_v2.c lastbus.c
bootblock-y += ../common/mmu_operations.c
bootblock-y += ../common/tracker.c ../common/tracker_v2.c
bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
diff --git a/src/soc/mediatek/mt8188/bootblock.c b/src/soc/mediatek/mt8188/bootblock.c
index 32ef4af2e3..f7b7849b36 100644
--- a/src/soc/mediatek/mt8188/bootblock.c
+++ b/src/soc/mediatek/mt8188/bootblock.c
@@ -4,6 +4,7 @@
#include <soc/eint_event.h>
#include <soc/mmu_operations.h>
#include <soc/pll.h>
+#include <soc/lastbus_v2.h>
#include <soc/tracker_common.h>
#include <soc/wdt.h>
@@ -11,6 +12,7 @@ void bootblock_soc_init(void)
{
mtk_mmu_init();
bustracker_init();
+ lastbus_init();
mtk_wdt_init();
mt_pll_init();
unmask_eint_event_mask();
diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h
index 63f059616f..74489764f9 100644
--- a/src/soc/mediatek/mt8188/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h
@@ -27,14 +27,20 @@ enum {
APMIXED_BASE = IO_PHYS + 0x0000C000,
SYSTIMER_BASE = IO_PHYS + 0x00017000,
INFRACFG_AO_BCRM_BASE = IO_PHYS + 0x00022000,
+ INFRA_AO_DBUG_BASE = IO_PHYS + 0x00023000,
PMIF_SPI_BASE = IO_PHYS + 0x00024000,
PMICSPI_MST_BASE = IO_PHYS + 0x00025000,
PMIF_SPMI_BASE = IO_PHYS + 0x00027000,
+ INFRA2_AO_DBUG_BASE = IO_PHYS + 0x00028000,
SPMI_MST_BASE = IO_PHYS + 0x00029000,
+ PERI_AO_BASE = IO_PHYS + 0x0002B000,
+ PERI_AO2_BASE = IO_PHYS + 0x0002E000,
DEVAPC_INFRA_AO_BASE = IO_PHYS + 0x00030000,
DEVAPC_PERI_AO_BASE = IO_PHYS + 0x00034000,
DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000,
DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000,
+ PERI_PAR_AO_BASE = IO_PHYS + 0x00040000,
+ FMEM_AO_BASE = IO_PHYS + 0x00042000,
DBG_TRACKER_BASE = IO_PHYS + 0x00208000,
PERI_TRACKER_BASE = IO_PHYS + 0x00218000,
EMI0_BASE = IO_PHYS + 0x00219000,
diff --git a/src/soc/mediatek/mt8188/lastbus.c b/src/soc/mediatek/mt8188/lastbus.c
new file mode 100644
index 0000000000..f2c0b0d57f
--- /dev/null
+++ b/src/soc/mediatek/mt8188/lastbus.c
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/lastbus_v2.h>
+
+const struct lastbus_config lastbus_cfg = {
+ .latch_platform = "MT8188",
+ .timeout_ms = 200,
+ .timeout_type = 0,
+ .num_used_monitors = 6,
+ .monitors = {
+ {
+ .name = "debug_ctrl_ao_INFRA_AO",
+ .base = INFRA_AO_DBUG_BASE,
+ .num_ports = 34,
+ .num_idle_mask = 2,
+ .idle_masks = {
+ {
+ .reg_offset = 0x04,
+ .reg_value = 0x2,
+ },
+ {
+ .reg_offset = 0x08,
+ .reg_value = 0x10000,
+ },
+ },
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_INFRA2_AO",
+ .base = INFRA2_AO_DBUG_BASE,
+ .num_ports = 9,
+ .num_idle_mask = 0,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_PERI_AO",
+ .base = PERI_AO_BASE,
+ .num_ports = 25,
+ .num_idle_mask = 1,
+ .idle_masks = {
+ {
+ .reg_offset = 0x04,
+ .reg_value = 0x20000,
+ },
+ },
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_PERI_AO2",
+ .base = PERI_AO2_BASE,
+ .num_ports = 20,
+ .num_idle_mask = 0,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_PERI_PAR_AO",
+ .base = PERI_PAR_AO_BASE,
+ .num_ports = 18,
+ .num_idle_mask = 0,
+ .bus_freq_mhz = 78,
+ },
+ {
+ .name = "debug_ctrl_ao_FMEM_AO",
+ .base = FMEM_AO_BASE,
+ .num_ports = 28,
+ .num_idle_mask = 1,
+ .idle_masks = {
+ {
+ .reg_offset = 0x14,
+ .reg_value = 0x204,
+ },
+ },
+ .bus_freq_mhz = 78,
+ },
+ },
+};