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authorYidi Lin <yidilin@chromium.org>2024-09-05 12:22:36 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-09-09 12:58:55 +0000
commit56e0ceb2c784133b170452486192afee67739a4d (patch)
tree336f4c982b5820c1813d5234e48f2e517179891a /src/soc/mediatek/mt8188
parentb23382c54b3f33133c12e2ce8fe826f306761b1d (diff)
soc/mediatek/common: Move common GPIO definitions to gpio_defs.h
BUG=none TEST=emerge-{asurada, cherry, corsola, geralt, rauru} coreboot Change-Id: If35dcc4d88732f92c7c43a5eed0478ec52cf1802 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84221 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8188')
-rw-r--r--src/soc/mediatek/mt8188/include/soc/gpio.h44
1 files changed, 5 insertions, 39 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/gpio.h b/src/soc/mediatek/mt8188/include/soc/gpio.h
index 916cf84e8f..b1b4b40247 100644
--- a/src/soc/mediatek/mt8188/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8188/include/soc/gpio.h
@@ -10,40 +10,12 @@
#include <soc/addressmap.h>
#include <soc/gpio_common.h>
+#include <soc/gpio_defs.h>
#include <types.h>
#define GPIO_NUM 177
enum {
- MAX_GPIO_REG_BITS = 32,
- MAX_GPIO_MODE_PER_REG = 8,
- GPIO_MODE_BITS = 4,
-};
-
-#define PIN(id, name, flag, bit, base, offset, \
- func1, func2, func3, func4, func5, func6, func7) \
- PAD_##name##_ID = id, \
- PAD_##name##_FLAG = flag, \
- PAD_##name##_BIT = bit, \
- PAD_##name##_BASE = base, \
- PAD_##name##_OFFSET = offset, \
- PAD_##name##_FUNC_##func1 = 1, \
- PAD_##name##_FUNC_##func2 = 2, \
- PAD_##name##_FUNC_##func3 = 3, \
- PAD_##name##_FUNC_##func4 = 4, \
- PAD_##name##_FUNC_##func5 = 5, \
- PAD_##name##_FUNC_##func6 = 6, \
- PAD_##name##_FUNC_##func7 = 7
-
-#define GPIO(name) ((gpio_t){ \
- .id = PAD_##name##_ID, \
- .flag = PAD_##name##_FLAG, \
- .bit = PAD_##name##_BIT, \
- .base = PAD_##name##_BASE, \
- .offset = PAD_##name##_OFFSET \
- })
-
-enum {
PIN(0, GPIO00, 0, 6, 0x31, 0xe0,
TP_GPIO0_AO, SPIM5_CSB, UTXD1, DMIC3_CLK,
I2SIN_MCK, I2SO2_MCK, DBG_MON_A0),
@@ -577,20 +549,14 @@ enum {
RES5, RES6, RES7),
};
-struct val_regs {
- uint32_t val;
- uint32_t set;
- uint32_t rst;
- uint32_t align;
-};
struct gpio_regs {
- struct val_regs dir[7];
+ struct gpio_val_regs dir[7];
uint8_t rsv00[144];
- struct val_regs dout[7];
+ struct gpio_val_regs dout[7];
uint8_t rsv01[144];
- struct val_regs din[7];
+ struct gpio_val_regs din[7];
uint8_t rsv02[144];
- struct val_regs mode[28];
+ struct gpio_val_regs mode[28];
uint8_t rsv03[560];
uint32_t dram_pinmux_trapping;
};