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authorRex-BC Chen <rex-bc.chen@mediatek.com>2022-06-13 19:10:02 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-07-07 13:08:15 +0000
commitf61557669a1047c7c13f6577e8feec8d784080e5 (patch)
tree35fb258bb5c4f3cdce18a03c3dfc79b7aeb8d861 /src/soc/mediatek/mt8188/spi.c
parenta33bcb97fe8c9aeb7d3dcde7959bc40b98ddb03e (diff)
soc/mediatek/mt8188: Add NOR-Flash support
Add NOR-Flash drivers for flash read/write. TEST=read nor flash data successfully. BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I4e84fc023111b86f7f4984020d24811e3361ba03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65621 Reviewed-by: Yidi Lin <yidilin@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8188/spi.c')
-rw-r--r--src/soc/mediatek/mt8188/spi.c34
1 files changed, 33 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8188/spi.c b/src/soc/mediatek/mt8188/spi.c
index 30eff1b7f3..5c35e6884e 100644
--- a/src/soc/mediatek/mt8188/spi.c
+++ b/src/soc/mediatek/mt8188/spi.c
@@ -2,20 +2,52 @@
/*
* This file is created based on MT8188 Functional Specification
- * Chapter number: 5.8
+ * Chapter number: 5.8, 5.19
*/
#include <device/mmio.h>
#include <soc/addressmap.h>
+#include <soc/flash_controller_common.h>
+#include <soc/gpio.h>
#include <soc/spi.h>
+struct pad_func {
+ gpio_t gpio;
+ u8 func;
+ enum pull_select select;
+};
+
+#define PAD_FUNC_SEL(name, func, sel) {GPIO(name), PAD_##name##_FUNC_##func, sel}
+
+static const struct pad_func nor_pinmux[4] = {
+ /* GPIO 125 ~ 128 */
+ PAD_FUNC_SEL(DMIC1_CLK, SPINOR_CK, GPIO_PULL_DOWN),
+ PAD_FUNC_SEL(DMIC1_DAT, SPINOR_CS, GPIO_PULL_UP),
+ PAD_FUNC_SEL(DMIC1_DAT_R, SPINOR_IO0, GPIO_PULL_DOWN),
+ PAD_FUNC_SEL(DMIC2_CLK, SPINOR_IO1, GPIO_PULL_DOWN),
+};
+
+void mtk_snfc_init(void)
+{
+ const struct pad_func *ptr = NULL;
+
+ ptr = nor_pinmux;
+ for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++) {
+ gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select);
+ gpio_set_mode(ptr[i].gpio, ptr[i].func);
+ }
+}
+
static const struct spi_ctrlr spi_flash_ctrlr = {
.max_xfer_size = 65535,
+ .flash_probe = mtk_spi_flash_probe,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
{
.ctrlr = &spi_flash_ctrlr,
+ .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+ .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
},
};