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authorBo-Chen Chen <rex-bc.chen@mediatek.com>2022-11-23 17:22:19 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-12-05 14:25:00 +0000
commitb1e7adeca160066052047462cb1f936cf68d873e (patch)
tree8b3867b9d6b0129f272dc605be8374e7444f4701 /src/soc/mediatek/mt8188/include
parentf9679c42876bab145f1b7a2a2e6e1eb5331fa418 (diff)
soc/mediatek/mt8188: Add display data path for MIPI output
For geralt project, we also support MIPI panel as our firmware display. So add this patch to configure ddp to choose eDP display or MIPI panel display. BUG=b:244208960 TEST=test firmware display pass for both eDP and MIPI panel on MT8188 EVB. Change-Id: I06f38b1889811274588c26e9284da4d502acf38b Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70181 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8188/include')
-rw-r--r--src/soc/mediatek/mt8188/include/soc/ddp.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/ddp.h b/src/soc/mediatek/mt8188/include/soc/ddp.h
index 26f015183f..475485eb62 100644
--- a/src/soc/mediatek/mt8188/include/soc/ddp.h
+++ b/src/soc/mediatek/mt8188/include/soc/ddp.h
@@ -82,7 +82,8 @@ enum {
CG_CON0_DISP_AAL0 |
CG_CON0_DISP_GAMMA0 |
CG_CON0_DISP_DITHER0 |
- CG_CON0_DISP_DP_INTF0,
+ CG_CON0_DISP_DP_INTF0 |
+ CG_CON0_DISP_DSI0,
CG_CON0_ALL = 0xffffffff
};
@@ -122,7 +123,8 @@ enum {
CG_CON2_DPI_DPI0 = BIT(8),
CG_CON2_DP_INTF0 = BIT(16),
- CG_CON2_DISP_ALL = CG_CON2_DP_INTF0,
+ CG_CON2_DISP_ALL = CG_CON2_DSI_DSI0 |
+ CG_CON2_DP_INTF0,
CG_CON2_ALL = 0xffffffff
};
@@ -280,7 +282,12 @@ enum {
SMI_LARB_PORT_L0_OVL_RDMA0 = 0xF88,
};
+enum disp_path_sel {
+ DISP_PATH_EDP = 0,
+ DISP_PATH_MIPI,
+};
+
void mtk_ddp_init(void);
-void mtk_ddp_mode_set(const struct edid *edid);
+void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel);
#endif