diff options
author | ot_zhenguo.li <ot_zhenguo.li@mediatek.corp-partner.google.com> | 2023-02-24 13:55:27 +0800 |
---|---|---|
committer | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2023-03-10 12:38:31 +0000 |
commit | 6bd9d959ddc3fabd84c57de41c6a1db7c400f562 (patch) | |
tree | 711884a36cf424ad1d35cc4874211596a8866e26 /src/soc/mediatek/mt8188/include | |
parent | c9bf43f4d6caa4b59a6eaff8fff2929c609c6122 (diff) |
soc/mediatek/mt8188: Enable lastbus debug hardware
Lastbus is a bus debug tool. When the bus hangs, the bus transmission
information before resetting will be recorded.
The watchdog cannot clear it and it will be printed out for bus hanging
analysis.
There are two versions for lastbus:
Version 1 for MT8186, and version 2 for MT8188.
BUG=b:263753374
TEST=build pass.
Change-Id: Ibaf510481d1941376bd8da0168ef17c99a0fb9a2
Signed-off-by: ot_zhenguo.li <ot_zhenguo.li@mediatek.corp-partner.google.com>
Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73624
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8188/include')
-rw-r--r-- | src/soc/mediatek/mt8188/include/soc/addressmap.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h index 63f059616f..74489764f9 100644 --- a/src/soc/mediatek/mt8188/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h @@ -27,14 +27,20 @@ enum { APMIXED_BASE = IO_PHYS + 0x0000C000, SYSTIMER_BASE = IO_PHYS + 0x00017000, INFRACFG_AO_BCRM_BASE = IO_PHYS + 0x00022000, + INFRA_AO_DBUG_BASE = IO_PHYS + 0x00023000, PMIF_SPI_BASE = IO_PHYS + 0x00024000, PMICSPI_MST_BASE = IO_PHYS + 0x00025000, PMIF_SPMI_BASE = IO_PHYS + 0x00027000, + INFRA2_AO_DBUG_BASE = IO_PHYS + 0x00028000, SPMI_MST_BASE = IO_PHYS + 0x00029000, + PERI_AO_BASE = IO_PHYS + 0x0002B000, + PERI_AO2_BASE = IO_PHYS + 0x0002E000, DEVAPC_INFRA_AO_BASE = IO_PHYS + 0x00030000, DEVAPC_PERI_AO_BASE = IO_PHYS + 0x00034000, DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000, DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000, + PERI_PAR_AO_BASE = IO_PHYS + 0x00040000, + FMEM_AO_BASE = IO_PHYS + 0x00042000, DBG_TRACKER_BASE = IO_PHYS + 0x00208000, PERI_TRACKER_BASE = IO_PHYS + 0x00218000, EMI0_BASE = IO_PHYS + 0x00219000, |