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authorYidi Lin <yidilin@chromium.org>2024-09-05 17:10:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-09-12 16:57:11 +0000
commitf3b698462975a5b23004affca45a6dd1a3ff46a6 (patch)
treea94a1af1b963d6140081e5c4b8c2e4d50304d974 /src/soc/mediatek/mt8186/spi.c
parentffc48178de6eee2e4efd33b4943f922475badc71 (diff)
soc/mediatek: Remove redundant struct pad_func and PAD_* definitions
Clean up redundant `struct pad_func` and `PAD_*` definitions. This patch also refactors the PAD_* macros by, - Repurposing PAD_FUNC and dropping PAD_FUNC_SEL. - Adding PAD_FUNC_DOWN and PAD_FUNC_UP to avoid the implicit initialization. BUG=none TEST=emerge-{elm, kukui, asurada, cherry, corsola, geralt, rauru} coreboot Change-Id: I12b8f6749015bff52988208a7c3aa01e952612c6 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84222 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8186/spi.c')
-rw-r--r--src/soc/mediatek/mt8186/spi.c86
1 files changed, 38 insertions, 48 deletions
diff --git a/src/soc/mediatek/mt8186/spi.c b/src/soc/mediatek/mt8186/spi.c
index adbd437e4a..70b9ecd980 100644
--- a/src/soc/mediatek/mt8186/spi.c
+++ b/src/soc/mediatek/mt8186/spi.c
@@ -41,81 +41,71 @@ struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = {
}
};
-struct pad_func {
- gpio_t gpio;
- u8 func;
- enum pull_select select;
-};
-
-#define PAD_FUNC(name, func) {GPIO(name), PAD_##name##_FUNC_##func, GPIO_PULL_DOWN}
-#define PAD_FUNC_SEL(name, func, sel) {GPIO(name), PAD_##name##_FUNC_##func, sel}
-#define PAD_FUNC_GPIO(name) {GPIO(name), 0, GPIO_PULL_DOWN}
-
static const struct pad_func pad0_funcs[SPI_BUS_NUMBER][4] = {
{
- PAD_FUNC(SPI0_MI, SPI0_MI_A),
+ PAD_FUNC_DOWN(SPI0_MI, SPI0_MI_A),
PAD_FUNC_GPIO(SPI0_CSB),
- PAD_FUNC(SPI0_MO, SPI0_MO_A),
- PAD_FUNC(SPI0_CLK, SPI0_CLK_A),
+ PAD_FUNC_DOWN(SPI0_MO, SPI0_MO_A),
+ PAD_FUNC_DOWN(SPI0_CLK, SPI0_CLK_A),
},
{
- PAD_FUNC(SPI1_MI, SPI1_MI_A),
+ PAD_FUNC_DOWN(SPI1_MI, SPI1_MI_A),
PAD_FUNC_GPIO(SPI1_CSB),
- PAD_FUNC(SPI1_MO, SPI1_MO_A),
- PAD_FUNC(SPI1_CLK, SPI1_CLK_A),
+ PAD_FUNC_DOWN(SPI1_MO, SPI1_MO_A),
+ PAD_FUNC_DOWN(SPI1_CLK, SPI1_CLK_A),
},
{
- PAD_FUNC(SPI2_MI, SPI2_MI_A),
+ PAD_FUNC_DOWN(SPI2_MI, SPI2_MI_A),
PAD_FUNC_GPIO(SPI2_CSB),
- PAD_FUNC(SPI2_MO, SPI2_MO_A),
- PAD_FUNC(SPI2_CK, SPI2_CLK_A),
+ PAD_FUNC_DOWN(SPI2_MO, SPI2_MO_A),
+ PAD_FUNC_DOWN(SPI2_CK, SPI2_CLK_A),
},
{
- PAD_FUNC(SPI3_MI, SPI3_MI),
+ PAD_FUNC_DOWN(SPI3_MI, SPI3_MI),
PAD_FUNC_GPIO(SPI3_CSB),
- PAD_FUNC(SPI3_MO, SPI3_MO),
- PAD_FUNC(SPI3_CLK, SPI3_CLK),
+ PAD_FUNC_DOWN(SPI3_MO, SPI3_MO),
+ PAD_FUNC_DOWN(SPI3_CLK, SPI3_CLK),
},
{
- PAD_FUNC(EINT13, SPI4_MI_A),
+ PAD_FUNC_DOWN(EINT13, SPI4_MI_A),
PAD_FUNC_GPIO(EINT11),
- PAD_FUNC(EINT12, SPI4_MO_A),
- PAD_FUNC(EINT10, SPI4_CLK_A),
+ PAD_FUNC_DOWN(EINT12, SPI4_MO_A),
+ PAD_FUNC_DOWN(EINT10, SPI4_CLK_A),
},
{
- PAD_FUNC(SPI5_MI, SPI5_MI),
+ PAD_FUNC_DOWN(SPI5_MI, SPI5_MI),
PAD_FUNC_GPIO(SPI5_CSB),
- PAD_FUNC(SPI5_MO, SPI5_MO),
- PAD_FUNC(SPI5_CLK, SPI5_CLK),
+ PAD_FUNC_DOWN(SPI5_MO, SPI5_MO),
+ PAD_FUNC_DOWN(SPI5_CLK, SPI5_CLK),
},
};
static const struct pad_func pad1_funcs[SPI_BUS_NUMBER][4] = {
{
- PAD_FUNC(EINT3, SPI0_MI_B),
+ PAD_FUNC_DOWN(EINT3, SPI0_MI_B),
PAD_FUNC_GPIO(EINT1),
- PAD_FUNC(EINT2, SPI0_MO_B),
- PAD_FUNC(EINT0, SPI0_CLK_B),
+ PAD_FUNC_DOWN(EINT2, SPI0_MO_B),
+ PAD_FUNC_DOWN(EINT0, SPI0_CLK_B),
},
{
- PAD_FUNC(EINT9, SPI1_MI_B),
+ PAD_FUNC_DOWN(EINT9, SPI1_MI_B),
PAD_FUNC_GPIO(EINT7),
- PAD_FUNC(EINT8, SPI1_MO_B),
- PAD_FUNC(EINT6, SPI1_CLK_B),
+ PAD_FUNC_DOWN(EINT8, SPI1_MO_B),
+ PAD_FUNC_DOWN(EINT6, SPI1_CLK_B),
},
{
- PAD_FUNC(CAM_PDN1, SPI2_MI_B),
+ PAD_FUNC_DOWN(CAM_PDN1, SPI2_MI_B),
PAD_FUNC_GPIO(CAM_PDN0),
- PAD_FUNC(CAM_RST0, SPI2_MO_B),
- PAD_FUNC(EINT18, SPI2_CLK_B),
+ PAD_FUNC_DOWN(CAM_RST0, SPI2_MO_B),
+ PAD_FUNC_DOWN(EINT18, SPI2_CLK_B),
},
{
},
{
- PAD_FUNC(I2S2_DI, SPI4_MI_B),
+ PAD_FUNC_DOWN(I2S2_DI, SPI4_MI_B),
PAD_FUNC_GPIO(I2S2_BCK),
- PAD_FUNC(I2S2_LRCK, SPI4_MO_B),
- PAD_FUNC(I2S2_MCK, SPI4_CLK_B),
+ PAD_FUNC_DOWN(I2S2_LRCK, SPI4_MO_B),
+ PAD_FUNC_DOWN(I2S2_MCK, SPI4_CLK_B),
},
{
},
@@ -124,17 +114,17 @@ static const struct pad_func pad1_funcs[SPI_BUS_NUMBER][4] = {
static const struct pad_func nor_pinmux[SPI_NOR_GPIO_SET_NUM][4] = {
/* GPIO 36 ~ 39 */
[SPI_NOR_GPIO_SET0] = {
- PAD_FUNC_SEL(SPI0_CLK, SPINOR_CK, GPIO_PULL_DOWN),
- PAD_FUNC_SEL(SPI0_CSB, SPINOR_CS, GPIO_PULL_UP),
- PAD_FUNC_SEL(SPI0_MO, SPINOR_IO0, GPIO_PULL_DOWN),
- PAD_FUNC_SEL(SPI0_MI, SPINOR_IO1, GPIO_PULL_DOWN),
+ PAD_FUNC(SPI0_CLK, SPINOR_CK, GPIO_PULL_DOWN),
+ PAD_FUNC(SPI0_CSB, SPINOR_CS, GPIO_PULL_UP),
+ PAD_FUNC(SPI0_MO, SPINOR_IO0, GPIO_PULL_DOWN),
+ PAD_FUNC(SPI0_MI, SPINOR_IO1, GPIO_PULL_DOWN),
},
/* GPIO 61 ~ 64 */
[SPI_NOR_GPIO_SET1] = {
- PAD_FUNC_SEL(TDM_RX_BCK, SPINOR_CK, GPIO_PULL_DOWN),
- PAD_FUNC_SEL(TDM_RX_MCLK, SPINOR_CS, GPIO_PULL_UP),
- PAD_FUNC_SEL(TDM_RX_DATA0, SPINOR_IO0, GPIO_PULL_DOWN),
- PAD_FUNC_SEL(TDM_RX_DATA1, SPINOR_IO1, GPIO_PULL_DOWN),
+ PAD_FUNC(TDM_RX_BCK, SPINOR_CK, GPIO_PULL_DOWN),
+ PAD_FUNC(TDM_RX_MCLK, SPINOR_CS, GPIO_PULL_UP),
+ PAD_FUNC(TDM_RX_DATA0, SPINOR_IO0, GPIO_PULL_DOWN),
+ PAD_FUNC(TDM_RX_DATA1, SPINOR_IO1, GPIO_PULL_DOWN),
},
};