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authorSen Chu <sen.chu@mediatek.corp-partner.google.com>2022-09-05 19:19:48 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-09-09 10:43:43 +0000
commita292f41faef437555c675d50090dc107bfff375e (patch)
treea986b9719009afb7067af0175991328549452b00 /src/soc/mediatek/mt8186/mt6366.c
parentad0288a843ab65f2a567cf6095c129e2ca8e8476 (diff)
soc/mediatek/mt8186: Enable CPU power hardware tracking for PMIC MT6366
1. There are two power sources for CPU: - Logic power (VPROC). - SRAM power (VSRAM_PROC). 2. There is a constraint between VPROC and VSRAM_PROC: - 0mV <= VSRAM_PROC - VPROC <= 250mV. With software control, the constraint might not always hold. Therefore, we enable hardware tracking from PMIC MT6366 to ensure the constraint is met automatically. BUG=b:236353282, b:241615706 TEST=meet the constrain correctly when adjusting the voltage. Signed-off-by: Sen Chu <sen.chu@mediatek.corp-partner.google.com> Change-Id: I6012c57e60c009f1d599b57aab1c2526ee789208 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67436 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8186/mt6366.c')
-rw-r--r--src/soc/mediatek/mt8186/mt6366.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c
index af5403a55d..92174c0fe3 100644
--- a/src/soc/mediatek/mt8186/mt6366.c
+++ b/src/soc/mediatek/mt8186/mt6366.c
@@ -159,6 +159,15 @@ static struct pmic_setting init_setting[] = {
{0x1A56, 0x7FFF, 0x7FFF, 0},
{0x1B48, 0x10, 0x7F, 0},
{0x1B4A, 0xF15, 0x7F7F, 0},
+ /* Enable HW Tracking */
+ {0x1B66, 0x10, 0x7F, 8},
+ {0x1B68, 0x38, 0x7F, 0},
+ {0x1B68, 0x63, 0x7F, 8},
+ {0x1B64, 0x6, 0x7, 0},
+ {0x1B6E, 0x10, 0x7F, 8},
+ {0x1B70, 0x38, 0x7F, 0},
+ {0x1B70, 0x63, 0x7F, 8},
+ {0x1B6C, 0x6, 0x7, 0},
{0x1B8A, 0x10, 0x7F, 0},
{0x1B8C, 0xF15, 0x7F7F, 0},
{0x1BA8, 0x10, 0x7F, 0},